Print THIS 3-D Mechanical Memory !

[RJSV]

Photo shows approx what a 10 decimal digit involves. In back is a tower for decoding an address, 1 of 10 'registers' in the form of thick plate assemblies.
Second photo, a blow up, has a smaller scale example of a single register, as four plates stacked and aligned. Most cases the original material is a non-brittle plastic sheet termed 'double-wall'. That provides a set of vertical channels, many of which for computer data bus runs.
Photo 3 is a close up: under the top plate and on left third of plate, is seen a diagonal running set. This is the'Read bus' for output on side.

[MK14]

Was any of the 'computer/memory', made up physically, so that it can be watched, while it runs (computes) things ?

I seem to be able to see paper/card, with line drawings on it, in your pictures. But, without seeing it 'in real life', physical form. It is that much harder, to see and understand it, working in practice.

I.e. Was any prototypes constructed ?

[RJSV]

In response re: PROTOTYPEs, Most relevant was verifying (at least one variation) of register function. That invention constituted a hardware innovation, but my focus has always been on 'higher' organization issues. Example rotary switch vs in-line: That's purposely 'a don't care', similar to TTL use, etc.
 This register, called a decimal digit store, has some problem areas, but works when designed and built with moderate care: The steel balls are 1/4 inch bearings, a little too light for actuating levers etc. Mainly, I observed, a falling, rolling ball can bounce when striking any protruding tab reminants, say portion of TAB next to an epoxy glue dab. So, yes, the thing and concepts worked, but hand-built takes a while and 'glitch' proofing. A major packaging benefit, of the flat plate way, is avoidance of curvey shapes: a package having ten of those flat plate registers is naturally ready for 'stacking', plus uses of sloping mounts, on my prototyping frames. Please see fig. 32 etc, for a look at the ease of expansion, when parts are flat and uniform. That assembly, by the way, is deliberately HUGE, for engaging an audience!! Once you rope em in, you can hit em with the science. Estimates of cost, $ 6000 for one pair of that 'Wide Bus' demo frame, and you can see two ways to stack the system. That demo can be done right there: No processor, OR, as a supplement or indeed a math unit connected to a system proper.
Now, no way that whole framed pair was functional, it was a size / appearance mock up, where a ball could clunk clunk,...clunk... clunk, and drop out at bottom, as a simulated data read. Keep in mind functional aspects were explored and proven, just maybe in less bold portions, of the read-write basics.
That fig 32, 33 provides a teacher with an easy to present and fully detailed lesson, perhaps 30 minutes needed for the teacher, and for a quick 8 minute engagement w student audience. But you gotta start with that 6 grand cost, so...
  The 10 digit register bank shown requires all kinds of system functions and computer science expertise, of at least 1980 technological comprehension. And money, lots of money.
As to the 'Abandoned' status, boy was it ever! That's another story, but suffice it to say, punishing but overall a great project from an artistic and packaging standpoint.

[Bud]

Can you guys tell me where i can buy that substance you smoke?

[MK14]

Can you guys tell me where i can buy that substance you smoke?

It should have been explained. This comes from another thread. The OP, decided to start a new thread, here.
There were more details in the other thread, about the mechanical computer.
I hoped/assumed, the OP was going to re-explain things here.

My understanding, is that it is mainly meant to demonstrate how a computer works. because it can be set up in a museum, and places like that. Then people can watch it compute things. You then see balls move about, andf stuff, while it does calculations. There is a big patent, about it.
The OP, can better explain, how far he got with it.

Here is a (probably completely different) example:

[RJSV]

Uh, Bud: No drugs, I have to say, (this being a potentially family friendly venue.) But there IS extortion, burglery, mail interference, intimidation, uh, 'spying', romance, (animal) rescue, and theft... But none of the other, usual stuff you can read, in a good fiction. But I also am taking the hints seriously, in that I do need to take some time, starting with a repeat inclusion of the Google link to USPTO portal.
 The patent application title is self-explanatory :
BASTIAN: titled: "Methods and Components for Mechanical Computer". That's a 2002 filing, but the portal has all of it. My current task, is to try and copy that link back in, here. OR, please look at 'Dodgy Tech's section, near end, it's title is "Super Non-Intuitive filter cascade'.  Hope to improve this, and use a tri-pod, for
better clarity, and less potential waste of everyone's time, there. Thank you; - RJ in Hayward

[MK14]

My current task, is to try and copy that link back in, here.

https://patents.google.com/patent/US20030172205A1/en

{ I just copied and pasted the link, into the forum post }
{ But, you can also do it, by clicking on the 'Insert Hyperlink' icon, just above the row of smileys (  ), near the left hand side. }

[Berni]

There is a old Japanese relay computer that used telephone crossbar switches as a form of mechanical memory:
https://hackaday.com/2019/12/06/visiting-the-facom-128b-1958-relay-computer/

They still have one restored and maintained in working order.

[RJSV]

Oh, thanks, I'd like to see more, on that vintage memory: I'm guessing that's electro-mechanical, an interesting hybrid, being electrically actuated, mechanically stored, and electrically read-out (later).
Bud: I hear you; some additional intro needed here. The ideas, are 'vintage' in the sense of lacking direct semi-conductor switches. Maybe I would try using a flippant title, like "Babbage meets Wozniak", but there is some pure science in that (patent) in the sense of the physical description being superceded by logical outcomes. Enter the ideas around XOR, an exclusive or function, however implemented physically.
So, by way of more INTRO, I wonder how much of a challenge some of my logic devices are, to 3-D printing enthusiasts (this thread felt like an orphan, seeking the appropriate home.) Today, the subject has one foot in science convention of 1920; other foot in 2002.  I'm partially surprised no one gave my post the boot, already. But being museum oriented maybe is the save, there.
So, can someone looking for a challenge, doing computer- related 3-D printing...AND, please point me to where there are clear guidelines around what is fairly easy, and what structures are a problem? I can possibly suggest changes on my end. Like, for instance, I could live with a 3-D printed housing, assembled later, with (that) bunch of long rotatable shafts. Locally, a Hayward city library offered a workshop, accessable to anyone having a library card. Nice!
  The efforts inventing, plus business exploration came to create some (potent) ridicule on my case, sadly. One smart guy snarked: "What good is it, if it doesn't even have BINARY, there?". Uh, well, you can teach around that omission, as there is an advanced, multi-state DECIMAL version, having all the conventional instruction fetch, pointer register post-increments etc. for a productive teacher with some 8 year old students! Just teach the binary cr*p later. I guess I'm a 'binary hater', (sigh). But both major types are present and described, and anyone is free to utilize.  The patent protection is only active after grant. Just be careful, but there is plenty room for those interested in getting production and use up and running.
I had a 'car mechanic' and a 'store clerk's claiming a small scale system running a student's code " is no computing." My response, "it runs at the speed of learning" plus any education can maybe benefit.
  So, by reading that monster of a document, gives an intro, and subsequent innovation exists. Maybe as we go, I can present the improved and attractive appearing systems, for teaching. That's why I wear other hats; Artist, graphic designer, comedian (wanna be !)
I think I fit 9 years of development / documentation, into 4, according to MK-14. Thanks to all, more later.
- RJ

[RJSV]

Here are some tips, for reading the (long) patent, on a Mechanical Computer teaching system:
  First, please see link, posted by MK-14 on Aug. 6:
  The drawings have fig. 2 showing available subjects, or chapters.
  For the question: Why a decimal base? First thing, it helps to examine a timed sequencer. In a binary coded number system of say 4 and 8 bits, there is required one controller output per bit, that lends to a wider control path, as opposed to a single control output. In the case of 4 bits, a 1111 must be issued in parallel for the worse case of reading a '15'.
  Examination of this situation, reveals a way of avoiding a data load pre-step:  By utilizing BOTH state outputs, of each flip-flop, the data clearing pre-step is avoided, assuming a receiving f/f  has both set and reset. I called this a PN bus, causing a run of 8 lines to convey the (4 bit) register state, down to a next register.
  Now, in the DECIMAL case, the 'N' signals convey data redundantly: for any given 'integer switch' the simple presence of a 'P' signal, elsewhere, indicates or conveys a reset... So, for example, the switch for asserting a '6', must be reset if a '2' is being impressed or written. Thus each switch or long shaft is burdened by more incoming signals (the other 9), but the BUS signal simplifies to 1 of ten. In many cases that tenth selection can be by default.
This all may sound wastefull, but many system advantages happen, using this un- coded BUS.
  For those seeking 3-D printing tasks, please see fig. 13a, b, and c.
  Find the text, towards the end of doc, for fig. 32, 33a, 33b. That's some novelty there: A 100 line un-coded BUS that has latching means (2 multiplexed digits for range 0 thru 99).  Drop one ball, into any line: "Now," says the teacher, "that (conduit) has been memorized, for later!".  But HOW could this be? Looking at the DEMO machine, there are only ten lines, in the middle.
  Sure enough, a special line, 'reader or RS' can take a dropped ball, routing it to exactly the same place, like '42' for example. The whole set-up seems like it would need the 100 lines throughout, to function. But it doesn't. Of course, all (almost) of you readers will see thru the 'trick' right away, but I don't know... Probably fool me!
  At any rate, please try to find and read that section, on fig. 32, 33.  I won't spoil the story / answer.

[MK14]

I wanted to continue/finish-off the conversations(s), from the original thread. So, since (as mentioned), you have moved it here. I decided to continue it here. So, from the other/original thread (Bold emphasis added by me):

Yes, I am ok with anyone using links, to the abandoned patent application seen above. Any further details, on the binary computer I think best if I soon start a separate POST probably in the vintage computer topics section. In principal, the steel ball and moving paddle constituted a BASE ONE math operation: The  moving ball as a 'mass impulse'  means, with positional encoding... Thus the moving (falling) ball embodies an inherent self-clock.
 I had, subsequently, moved up the organizational chain, after filing that jumbo patent. Look for a post later, probably in VINTAGE COMPUTER topics. The decimal system is where the 'cool' sh*t' really gets rolling. I think I can put together an essay on the 10 digit 'RAM' block, of approx size of  a basket ball.
You could run decent code using 100 digits of RAM storage. Both system types are physically BASE ONE, I  swear! (Hint: Binary or Decimal systems build the BASE up by concatenating base-one impulses using dedicated 'positional encoding'.
- RJHayward

"constituted a BASE ONE math operation:"

I would suggest, it is still a BASE 2 device. But, the concept of these BASE ONE devices, does exist in electronics, and is used. Let me explain.

A normal output on a modern (CMOS) gate (e.g. NAND), can go to (almost) the full supply rail swing. E.g. +3.3 V or Ground (0 V), for binary logic levels, 1 and 0, respectively.

But there are other types of outputs, called open-collector (open-drain these days), or tri-state.
These types, as well as being able to go to logic 0 and 1 (when a suitable resistor to the positive rail, is connected, in the case of the open collector/drain types), can go into an off/inactive/open state.
In the case of tri-state outputs, it is when the output enable (may be called something else), deactivates the outputs, and puts them into the tri-state/input/open/hi-z state. In the case of microcontrollers, this is usually when the port output direction register, is set into a bit pattern, that makes them go high impedance (naming schemes can differ).

So, what I am trying to say is, that those devices, have a BASE ONE like mode, whereby they are off/inactive/high-impedance. Which allows other devices to control the (if there are many related pins, often called a) bus.
In the case of open collector/drain, it can be used to make a wired-OR (or in a different configuration, not discussed here, wired-AND).

So, it is a binary (Base two system), which can be put into (or left in), a BASE ONE state, if you want. But, really (while it is working/computing), it represents a BASE TWO (binary) system.

tl;dr
Overall it is a binary system, because it has two possible states. Even though, some of the time (because the balls are elsewhere, or it is full of balls, at the moment), it may seem as if it is a base one system.

Analogy:
One might have an NE555 timer, which has been set to time for exactly ten minutes. So, once it is powered up and triggered. The output (connected to a lamp, LED or buzzer etc), is in the off state (logic 0).
So, for the next 10 minutes, you could (incorrectly, in my opinion), call it a BASE ONE system.
But (to prove me right), after the ten minutes is up, the output will change (to on, logic 1), the lamp/buzzer will turn on, illustrating the fact, that it was indeed a binary (base two) system. Since it has now moved to the other state.
Until either the power is switched off, or it is restarted, and will be off, for another ten minutes.

[RJSV]

I cannot answer without sounding ridiculous, but here's some sincere points:
  The 0 number here, is much more of a CHARACTER, being a symbol, rather than a simple count. So, here goes: ... "ZERO isn't NOTHING". Silly, right ?
 So look at (that number) as not enough, you need at least another symbol, for actual practice.  My system has to use binary, or two-state pivots, for implementing that... Silly sounding, again.
  I like the TRI-STATE concepts, thanks.
  This is going to take some time, coffee, etc. for the pondering...

[RJSV]

Ok now, thanks MK14, the concept of Tri-state helps for understanding, and, yet again, please be warned: this explanation / narration is gonna get SILLY sounding, fast!
In the photo, is a memory cell capable of 3 distinct states: When writing those states, you've got a default pre-step for state number = '2',  always a default pre-conditioning step of pre-clear, of the first (top) wheel. This puts the little 'cell' into Tri-state mode, in a way. The second wheel could be viewed as 'disabled' as that wheel data never gets impressed or output to the shared memory system output BUS.
  Now, when writing data = 1 the signal (ball) re-positions the first f/f  'wheel' essentially turning the gate enable back on (so second wheel can output) and continues down to also place the second f/f wheel for storing a '1'.
   Alternately, for writing data = 0 the signal also re-positions the first (top) wheel, as an enable, and continues down to place the second f/f wheel, this time for storage of a '0'.
   NOW, THIS is where the fun starts, (it's 3:30 am by the way):
   First SILLY: "If you write NOTHING that's not zero."  (It turns out to be a '2' by way of being Tri-state !)
   BUT, and this is crucial aspect, that's actually consistent: Remember before, when I said "Zero is not nothing... It isn't: If you want data =0 you have to write it.
   Even worse sounding, this single location memory element does not share the traditional enabled / disabled (gate) or transparent aspect of electronic memory as there isn't a temporary static state, on the mechanical output BUS: it's all a brief impulse...
  When interrogating later, you do get desired function, as a reading result, a 0, a 1, or a 2.
  So it all functions, the twists and turns of logical argument don't stop that.
  Maybe just call it BASE Z, and go home for dinner. But that's 'flippant' attitude. Thanks for your patience.
I'm sticking w BASE ONE.

[Berni]

Using tristate as a logic level in a Base 3 system is not very usefull because someone looking at the bus is going to have a tough time telling the tristate state apart from a zero or one state. The easiest way to fix that is to add a pullup resistor to half the voltage so that tristate results in a state between one and zero. But at that point you just invented a interface with 3 levels.

This sort of 3 level digital signaling is already used on 100Mbit Ethernet (Along with some fancy encoding it helps reduce the bandwidth requirements for the cable)

[MK14]

Using tristate as a logic level in a Base 3 system is not very usefull because someone looking at the bus is going to have a tough time telling the tristate state apart from a zero or one state. The easiest way to fix that is to add a pullup resistor to half the voltage so that tristate results in a state between one and zero. But at that point you just invented a interface with 3 levels.

This sort of 3 level digital signaling is already used on 100Mbit Ethernet (Along with some fancy encoding it helps reduce the bandwidth requirements for the cable)

I didn't explain it very well, nor did I think it through, well enough.
My better analogy, of a Tri-state system, is as follows.
For the output, there is a cup, which I or someone else, can put a ball in.

If I put a RED ball in it, it represents logic state '1'.
If I put a GREEN ball in it, it represents logic state '0'
If it is EMPTY (no ball from me) me, it represents the floating/input/tri-state/hi-z mode. Which means I am NOT outputting logic '0' nor logic '1'. But waiting for or allowing someone else, to control it, if they wish. Hence why it is empty.

As regards my original post, I should have said the tri-state output, also has a permanent, 10K, pull down resistor to ground (0 V). So the three output states would then be, logic '1', logic '0', and a weak (logic '0'), which can be over-ridden, if anything wants to, without causing a partial short-circuit (logic conflict, Glitch or worse, conflict and create an invalid logic level).
tl;dr
I've messed up, and made the situation more confusing. I need to rethink my explanations/analogies, to better explain the original point(s).

[Berni]

Yes but it still is not a state that is useful for getting information across so its still just binary base 2.

Tristate is indeed often used in computers to share a common data bus among multiple data sources. But whoever is driving the bus has no idea if the bus is in tristate or not. Instead there is some sort of additional ChipSelect or OutputEnable line that tells the data source when it is allowed to use the bus.

In the end its just a way of implementing a MUX in a way that is more efficient in terms of wiring runs. Instead of having one big MUX that switches the data lines of the correct data source t the bus, but rather spreads the MUX into chunks and puts part of the mux inside the source device, thus keeping the wires feeding into the MUX short since the input to it is right inside the source device now.

If you implement such a multiple driver bus structure inside a FPGA this whole thing does end up implemented as one big MUX fed by multiple sources. This is because FPGAs don't tend to use tristates internally, no idea why (but i suppose they deem the extra complexity of tristate drivers is not worth the benefit of building simpler muxes)

[MK14]

Yes but it still is not a state that is useful for getting information across so its still just binary base 2.

Tristate is indeed often used in computers to share a common data bus among multiple data sources. But whoever is driving the bus has no idea if the bus is in tristate or not. Instead there is some sort of additional ChipSelect or OutputEnable line that tells the data source when it is allowed to use the bus.

In the end its just a way of implementing a MUX in a way that is more efficient in terms of wiring runs. Instead of having one big MUX that switches the data lines of the correct data source t the bus, but rather spreads the MUX into chunks and puts part of the mux inside the source device, thus keeping the wires feeding into the MUX short since the input to it is right inside the source device now.

If you implement such a multiple driver bus structure inside a FPGA this whole thing does end up implemented as one big MUX fed by multiple sources. This is because FPGAs don't tend to use tristates internally, no idea why (but i suppose they deem the extra complexity of tristate drivers is not worth the benefit of building simpler muxes)

I shouldn't have mentioned tri-state. It took the discussion of base one, versus base two (binary), in the wrong direction.

Attempting to more properly make the point I was originally trying to get across.

If something has two possible states. E.g. There can be a ball in that position/runner or not. Then it would be a base two, hence binary system. Not a base one thing.

[RJSV]

   You are forgetting about the clock, but everything else mentioned looking solid. At least readers can get a sense, eventually, of the science (confronts inventors often).
  I have skimmed, but too much good / new stuff to cram a brain, yet.  Enclosed pls see a set of 2 'Path Layout Maps' diagrams.
  I can comment on that last feedback few lines, you are forgetting about the 'CLOCK'; it's there, it has to be:
The 'pure' science, to my view, dictates a CLOCK mechanism, seen as a logical orthagonal, to make functional sense. I cannot speak this exactly, but that invisible dimension is often taken care of, in electronics, but a line, literally CLOCK, often load-buffered. Then, convention says which edge, etc will qualify a signal / or a BUS.
  It's gotta be there, somehow, or you can't transfer (data state). 
  This is why, seeing the top shaft- linked wheel, you only have the one read signal output; the CLOCK state takes up the second (wheel position state.)
  So you get to pick off one state, the integer '2' output. That's half of an expected binary range...
  I enjoy this, partly through toleration attitude, of others' views / motivations... So yeah, bring it on, it's only words can't hurt, here.

  Please read the two flow diagrams from top down, while seeing a READ section is on right side. Schematically, the upper wheel system is shaft-coupled, using conventional labeles, (when possible.)
  Most nearly conventional operation the input section includes a 'Pre-Clear', sometimes seen in electronics (see NPN transistor) where only the '1' or 'ON' is suffient, given that a pre-step will guarantee a '0', if a passive zero is being copied.
  BUT, secondly, for discrete 3-state BUS operations of data copy (transfer) the Pre-Clear lable changes to a '2'   
 That's the third signal, in the bunch.
  More later, I appreciated this last round of feedback, however my in-coherance here.  Science kicks butt, huh ?
  First photo is less cluttered.

[MK14]

I attempted to find a source, to confirm the CORRECTNESS, of my assertions, that a base one, system, is fixed, in one state, all the time. Only to discover, that I am mistaken, it is not (although in another sense, it is).

https://en.wikipedia.org/wiki/Unary_numeral_system

It can represent numbers, as follows (If I have understood it correctly) ...
0 = '     '    {Yes, nothing, blank}
1 = 1
2 = 11
3 = 111
4 = 1111
5 = 11111
6 = 111111
7 = 1111111
8 = 11111111
9 = 111111111
10 = 1111111111

And so on.

 

I should have thrown fewer paper airplanes at the maths teachers, during maths classes (joke).

[RJSV]

Uh sorry... Not buying that (number bit pile), but thank you, I will try to correct this, a one and only one signal at a time, (or idle.)
  By the way, getting my smart phone manual / book soon, as can't yet copy text, for pasting.

Here is your newly revised table:

Integer 0 = 00000 00001
Integer 1 = 00000 00010
Integer 2 = 00000 00100
Integer 3 = 00000 01000
Integer 4 = 00000 10000

Integer 5 = 00001 00000
Integer 6 = 00010 00000
Integer 7 = 00100 00000
Integer 8 = 01000 00000
Integer 9 = 10000 00000 b

   Hah, looking too wastefull, but can be built. The shafts turned out to be approx. 9 inches, (22 mm).
Included for each shaft (using barbacue pokers) is a lane / column for reading; that's where a CLOCK identified ball 'magically' turns into a resolved data ball, for exit out the bottom BUS port.
  When writing, there are ten lanes/columns, and even better, optional add-on signals, like 'bus cycle corrupted', "check- sum incorrect", or also more normal uses, like 'Switch to Color Print' command.

  Use was made, also, of plastic 'slips' and epoxy.

  Now, for logging and debug purposes, each single ball 'data' is logged by way of pass-through, not altering the data encoding, er, 'un-coding', uh there I go!
  Crucial to a data flow logger is a BUS re-entrant counter (un-coded sequencer). Back to that photo, repeated here, imagine a Toggle type wheel, but with one paddle removed: First time (down) a ball pops out first sequence output.
Next re-entrant ball pops out the second sequencer output (often called outlet hose).  Idea is each new wheel becomes transparent after one use.
This is a nice example of 'component subtraction, for special uses, seen in that 2002 patent doc.
  Imagine, now, how much easier any sequencer controller can be built, requiring one ball, and built in a similar, thin line version, as compared to wider 10 lane BUS.
  Much of the system will require attention, to adequetly display action: I've seen some great UTUBE sequences of machines executing 'range control' etc.
One machine was going way too fast, to really get specific about what was going on.
  Myself, typically, would do my thing in back room, letting others do presentations while I design / build / test.  A clock-maker / Author, Laurie Penman was very helpful, (he a Mechanical Engineer). I could just sit back and take the money... Took me 30 years to get where I'm at, today. (Frail and poor).  But it's a great fun project, if one can survive (it).
  Nothing too unusual.
RJ in Hayward

[MK14]

Here is your newly revised table:

Integer 0 = 00000 00001
Integer 1 = 00000 00010
Integer 2 = 00000 00100
Integer 3 = 00000 01000
Integer 4 = 00000 10000

Integer 5 = 00001 00000
Integer 6 = 00010 00000
Integer 7 = 00100 00000
Integer 8 = 01000 00000
Integer 9 = 10000 00000 b

I'm happy with that.   

Because, as far as I'm concerned, those digits are merely the FONT (concept, i.e. direct equivalent), that you have used, so they are NOT binary numbers as such.
E.g. CMOS 4017, 10 digit decade counter, a telephone exchange relay like, 10 way counter/switch stage, or a 10 way, valve/tube counting tube, Dekatrons.



EDIT: Swapped massive real (not sure ?, if 2nd picture is real, either. It looks more like an LED version as well.) Dekatron (file might be too big (around 5 Mb) for some users preferences), for much smaller LED file version. If you want to see the big version, click below here:

[Berni]

We call it these days as One Hot Encoding:
https://en.wikipedia.org/wiki/One-hot

Its very wasteful on the number of wires, but as a benefit makes it very easy to decode into individual numbers (just take the wire for that number).

This is why it was popular in old computers as it was seen as a way of reducing the required logic to do something. For example if you need a counter you just connect the 9 output of one dekatron to the clock of the next. Wires are cheep while tubes are expensive, so using 20 wires to transfer a number between 0 and 99 was fine (While today this holds a number between 0 and 1048576)

Today this sort of encoding is mostly useful for state machines. In the old times of relay state machines this was useful as it could simply turn on all the relays for the corresponding state, these days its useful on FPGAs because not needing extra logic to decode states from binary reduces the path delay and so allows the state machine to run at a higher clock speed.

Just another type of binary encoding that provides a certain benefit.

[RJSV]

Dang! That's good reading... Going back to read again, I
can go read your 'One hot'. But first, some further on BUS signals.

  Ok, so a quick comment, a '0' (zero) is largely treated in a combinatorial way, just means you have to forget counting, sometimes maybe. For example battery charge = 0 is a valid 'nothing there. But as part of some number, say 30, that zero is highly symbolic, and actually distant from anything empty.

  The sequencer runs with single ball outputs, plus there often is needed some path switches, much relief reducing (width)  path selectors.
  Yes, now I recall the 'Unary' term, and plus it sure seems to auto- lead design upgrades. Decimal BUS, for example, is really just getting advantages by being sized, somewhere between 8 and 12 states. Technically 12 states are like 'Caddilac'.
  Math, seems like a chest, because frequently a table works fine, as in 10 by 10 lookup, as many digits as you can build for. Look up table typically the ROW can be 4X, while column could be '2'. That is  small digit, that way, memory cell '42' is where a 'READ' ball ends up. Then, a single 'answer' hose is run, latching a digit.
  Plus some more complexity but readers see could be an example MULTIPLY 4 X 2. So that 'answer hose' is then plugged in, to a great big LATCH. Range output is 0 through 99, non-multiplexed (raw 100 lines)

[Berni]

With mechanical computers it usually makes sense to use non binary systems

While electronics get a lot more complicated when they need to handle analog values between fully on or fully off, but mechanical things usually don't. Its just as easy to pull a lever half way and have some catch at the halfway point to detect that. various cams or lobes can be used to quickly decode these partway value into anything.

So by having a mechanical computer operate in decimal rotations of a shaft means it can transfer and store 0 to 9 on a single moving part. So with 4 shafts you can represent 0 to 9999, but if the shafts had only two binary states this would take 14 shafts. This makes for a massive reduction in complexity. You can even handle "floating point numbers" by simply removing any divisions and using the shafts angle to represent the number directly.

For this reason mechanical computers ware used even after the invention of the transistor. Some flight guidance systems or bomb targeting used complex arrangements of gears, cams, levers etc... to do fast trigonometric math, the computation result picked up electrically by potentiometers or resolvers and send to control the plane, missile, rocket.. etc

A good example of a mechanical computer operating on "floating point" is this:
https://hackaday.com/2014/11/18/harmonic-analyzer-mechanical-fourier-computer/
It calculates a Fourier and inverse Fourier transform using just a bunch of gears. While doing this on a digital computer is rather complex and very computationally intensive.

[RJSV]

To fix that last mess, some re-stated ALU method:
  It feels like cheating, but many ALU processes get replaced by a so-called ROM CORE answer table.
  First, a BUS PATH Switch is positioned, say by a '4',
I.E. '4X', then, a write of '2' is enough for an emerging ball, considered as to interrogate a 'cell' in a 100 position RAM block. For ROM, just run that 'answer' hose, to encoder position 8.
  This is for a MULTIPLY so 4 X 2 needs to latch in, as '8'.  Same dynamic for any arbitrary function, such as a COSINE (of 0 thru 90).
  The huge encoder latch has 10 by 10 bulk, so sports an investment in brackets. Next, any encoder will have latched, two answer digits, rather than the huge, raw 100 line BUS.
  Large can be good, or sometimes an excuse, which is why many museum venues tolerate some immediate waste, to gain a more presentable display.
   Anyhow, a BUS SWITCH has two planes, two sets of shafts: One set is for aquiring position, with band coupling to other set. That shaft set switches a whole BUS at once. About 12 lines is good. One line will be the 'RS' or READ-SYNC, a line signal seen, just about everywhere.
  Visually, BUSSWITCH has two sets of ten shafts, way down, in middle of (clear plastic) housing.
  The opposite, is an encoder. Very similar elements are used, ultimately having two digit 'result' created by also using BUS combiner conduit structures, (digital signals of like value are combined, before latching a result).