Author Topic: Flir E4 Thermal imaging camera review  (Read 156970 times)

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Offline mrflibble

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Re: Flir E4 Thermal imaging camera review
« Reply #125 on: October 13, 2013, 11:47:27 pm »
Mmmh, that does sound a bit cramped yes. You can do a lot with 1 kbit compressed, but more knowledge required on the typical distributions. Ah well, no doubt things will become more obvious when you take a closer look at the raw data.  ;D
 

Offline mikeselectricstuffTopic starter

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Re: Flir E4 Thermal imaging camera review
« Reply #126 on: October 14, 2013, 12:50:47 am »
What's also interesting is in the boot log it says:

FVD_Init: Downsampling setting: 0x00
...
FVD_Init: Downsampling setting: 80 60

Right after loading the fpga bitstream.

I suspect this is it telling the FPGA how to do the downsampling - I'm pretty sure the FPGA generates all the display data at the LCD's resolution and framerate, throws it into the ARM's camera interface, and the ARM just plots its text/graphics overlay on top and bungs it out to the LCD. The initial display at startup before WinCE starts  may be being done mostly/entirely by DMA
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Online Psi

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Re: Flir E4 Thermal imaging camera review
« Reply #127 on: October 14, 2013, 01:08:52 am »
Being a very new product i wonder if this unencrypted 320x240@60 output was a mistake.
Its possible they will remove it with a firmware update as soon as they realize.
« Last Edit: October 14, 2013, 01:13:00 am by Psi »
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Offline mrflibble

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Re: Flir E4 Thermal imaging camera review
« Reply #128 on: October 14, 2013, 01:18:35 am »
Not much they can do about it if it's the sensor module (microbolometer + ADC) that spit's out this raw data stream. That would require more just just a firmware upgrade to get that data encrypted. Best case scenario it will end up in a "Lessons Learned" document somewhere. :P

 

Offline mrflibble

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Re: Flir E4 Thermal imaging camera review
« Reply #129 on: October 14, 2013, 01:26:23 am »
I suspect this is it telling the FPGA how to do the downsampling - I'm pretty sure the FPGA generates all the display data at the LCD's resolution and framerate, throws it into the ARM's camera interface, and the ARM just plots its text/graphics overlay on top and bungs it out to the LCD.

That seems likely yes. One single fpga bitstream for the entire Ex series. And then default the downsampling to a very convenient all zeroes register value. As in even if you don't command it to setting 0x00, it'll already be running at this setting. Mmmh, it would be interesting to see a vid from someone showing the bootup sequence of an E5 or higher. Anyways, it commands the fpga to 80x60 downsampling, and then later it seems like it is reading the register (with downsampling setting) from fpga to confirm if it's correctly set.

There's probably an SPI port or something similar between cpu and fpga for commands and such. Can't think of why they would need anything more complicated than that...

 

Online Psi

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Re: Flir E4 Thermal imaging camera review
« Reply #130 on: October 14, 2013, 02:00:42 am »
Not much they can do about it if it's the sensor module (microbolometer + ADC) that spit's out this raw data stream. That would require more just just a firmware upgrade to get that data encrypted. Best case scenario it will end up in a "Lessons Learned" document somewhere. :P

Unless the sensor has the option for encryption and they just forgot to enable it when shipping the first units.
It would be easy to miss something like that if they were fixing bugs right up until the last minute when sending the production firmware for manufacturing.
« Last Edit: October 14, 2013, 02:04:45 am by Psi »
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Offline mrflibble

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Re: Flir E4 Thermal imaging camera review
« Reply #131 on: October 14, 2013, 02:16:57 am »
Mmmh, it would be interesting to see a vid from someone showing the bootup sequence of an E5 or higher.

Somehow I doubt someone who would buy an E5+ would be inclined to do that...

I meant it as: behave like a regular end user (NOT opening up anything), then boot it up, and point a video camera at the E5 display. The point of that excercise being to see what the resolution is juuuuuuust after the fpga bitstream loads, and before windows CE gets another chance to change the downsampling setting. Quite possible there's nothing to be seen, but also possible you see it start up at low res, and then suddenly jump to slightly higher res during bootup.


Unless the sensor has the option for encryption and they just forgot to enable it when shipping the first units.
It would be easy to miss something like that if they were fixing bugs right up until the last minute when sending the production firmware for manufacturing.

Mmmh, good point. I should hope that's not the case, but it wouldn't be the first time that the new guy forgot to set the CRYPT_THAT_SHIT define back to 1 after debugging. ;) Although thinking some more about it, it would seem a bit silly to encrypt a module like that with a bare die like that. And the module was a 2009 module, right? So the interface to that should be old hat for the Flir people. Anyways, will be interesting to see what the raw data looks like.
« Last Edit: October 14, 2013, 03:02:19 am by mrflibble »
 

Online Psi

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Re: Flir E4 Thermal imaging camera review
« Reply #132 on: October 14, 2013, 06:31:25 am »
Unless the sensor has the option for encryption and they just forgot to enable it when shipping the first units.
It would be easy to miss something like that if they were fixing bugs right up until the last minute when sending the production firmware for manufacturing.
Although thinking some more about it, it would seem a bit silly to encrypt a module like that with a bare die like that.

yeah, i think it's unlikely, but i don't want to get my hopes up too quickly :P
« Last Edit: October 14, 2013, 06:32:56 am by Psi »
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Offline mikeselectricstuffTopic starter

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Re: Flir E4 Thermal imaging camera review
« Reply #133 on: October 14, 2013, 08:59:48 am »
So is the consensus that the FPGA generates an 80x60 image by only sampling one of every 16 pixels in the original 320x240 image?
Probably avarages pixels - sampling every 16th wouldn't look as good, and would be noisy.
It may also be avaraging multiple frames from the 60fps feed to reduce noise.
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Offline mobbarley

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Re: Flir E4 Thermal imaging camera review
« Reply #134 on: October 14, 2013, 10:54:07 am »
If you look at the specs there is a sudden jump in sensitivity, particularly between E5 and E6 which I suspect it is a lens change.

Highly likely - Lens coatings make a big difference here, for example umicore's LWIR lenses  typically range from ">90%" transmission with their iDLC coating to ">97%" with their HEAR coating.

Thermal imagers have a large dynamic range and the FPGA is probably not only doing the flat field calibration but the tone mapping as well - the FPGA could just be truncating a bit or so of the sensor's output in the lower models to reduce sensitivity....
 

Offline mikeselectricstuffTopic starter

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Re: Flir E4 Thermal imaging camera review
« Reply #135 on: October 14, 2013, 11:49:58 am »
If you look at the specs there is a sudden jump in sensitivity, particularly between E5 and E6 which I suspect it is a lens change.

Highly likely - Lens coatings make a big difference here, for example umicore's LWIR lenses  typically range from ">90%" transmission with their iDLC coating to ">97%" with their HEAR coating.

Thermal imagers have a large dynamic range and the FPGA is probably not only doing the flat field calibration but the tone mapping as well - the FPGA could just be truncating a bit or so of the sensor's output in the lower models to reduce sensitivity....
My guess is it would be a bigger lens, to improve detail for 320x240 mode. Haven't yet found a clear image online of the front of all the versions.
There is also the issue of signal to noise ratio - downsampling 320x240 to 80x60 will also reduce noise, but for 320x240 it needs more light to get the same noise level.
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Offline amyk

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Re: Flir E4 Thermal imaging camera review
« Reply #136 on: October 14, 2013, 12:11:22 pm »
So is the consensus that the FPGA generates an 80x60 image by only sampling one of every 16 pixels in the original 320x240 image?
Probably avarages pixels - sampling every 16th wouldn't look as good, and would be noisy.
It may also be avaraging multiple frames from the 60fps feed to reduce noise.
Could it be that the raw 60fps data is too noisy to be of any use so it must be averaged, dropping the framerate to < 9fps? (This may mean the export-restricted version may need to clock the sensor even higher.)
 

Offline mikeselectricstuffTopic starter

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Re: Flir E4 Thermal imaging camera review
« Reply #137 on: October 14, 2013, 10:56:02 pm »
So is the consensus that the FPGA generates an 80x60 image by only sampling one of every 16 pixels in the original 320x240 image?
Probably avarages pixels - sampling every 16th wouldn't look as good, and would be noisy.
It may also be avaraging multiple frames from the 60fps feed to reduce noise.
Could it be that the raw 60fps data is too noisy to be of any use so it must be averaged, dropping the framerate to < 9fps? (This may mean the export-restricted version may need to clock the sensor even higher.)
It is noisy - you can see it on the scope. Hard to see how noisy till it gets to a screen.
It may be that for really useable 60fps you need a much bigger lens - the Ex0 series do appear to have significantly bigger lenses, while the sensitivity at 320x240 is almost the same
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Online Psi

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Re: Flir E4 Thermal imaging camera review
« Reply #138 on: October 15, 2013, 12:12:33 am »
Meanwhile, back at Flir...

"Why are we getting so many orders for Ex0 series replacement lenses"
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Offline marshallh

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Re: Flir E4 Thermal imaging camera review
« Reply #139 on: October 15, 2013, 01:33:58 am »
Surprised me to see a 40K LE part in there. They could've used a small 30k part but didn't. As I understand it, tone mapping is a lot like dynamic range compression in audio, which requires some competent dsp in 1 dimension, let alone two.
If the fpga is wired to the CSI input on the i.mx then it will still need to have some sort of ECSPI/i2c communication for setting parameters. That'd be where I'd start looking. (Assuming the 9fps is capped in the fpga for extra averaging time)
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Offline mikeselectricstuffTopic starter

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Re: Flir E4 Thermal imaging camera review
« Reply #140 on: October 15, 2013, 07:28:50 am »
Surprised me to see a 40K LE part in there. They could've used a small 30k part but didn't.
I'm sure they would have if they could. Bear in mind the hardware may well be the same or similar for the 60fps Ex0 models, and you don't know how much processing is needed between the sensor and a calibrated thermal image. Remember it's also doing the processing of the visible camera data. 
Quote
As I understand it, tone mapping is a lot like dynamic range compression in audio, which requires some competent dsp in 1 dimension, let alone two.
If the fpga is wired to the CSI input on the i.mx then it will still need to have some sort of ECSPI/i2c communication for setting parameters. That'd be where I'd start looking. (Assuming the 9fps is capped in the fpga for extra averaging time)
Yes, but with 2 BGAs on a 6 or 8 layer PCB it could be tough to find.
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Offline CzokNorris

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Re: Flir E4 Thermal imaging camera review
« Reply #141 on: October 15, 2013, 09:29:20 pm »

Hi,
hi Dave, hi mike, your channels are awesome!!
This seems to be a thread about mikes last FLIR E4 teardown - bet the folks at FLIR HQ are now really fearfully subscribing :-)

I had some thoughts yesterday:
Well, I wonder wether FLIR would sell their sensor assembly as replacement part - and if they do, how much it would cost. Getting a germanium lens from somewhere shouldn't be that much of a problem...
I have recently done some FPGA projects in VHDL at University and I bet its not very difficult to build something simple and cheap on a Spartan 6 to translate the sensor output to a visible image. VGA on an FPGA is more or less trivial and all the image stuff cant be that hard! Its just 320x240 @ 60 fps... Thats not particularily much data - especially since todays FPGAs contain enough S-Ram to allow for a full frame Buffer.

VGA Output
Say we have 256 colors on our output - this is one byte per pixel. One Frame contains 76k Pixels. So we need 76 kilobyte of Ram that is fast enough just for the output buffer.

Now lets see the input:
We have the AD on the chip which is providing around 16 bits of data per Pixel. So we get double the output data as raw in from the sensor, which is 150 kilobyte of raw AD-output per frame. The fact that its in two lanes which somehow each only cover 160 of the 320 total lines is interesting too, but not a big problem.

So our fpga needs at least around 300 kilobytes of Sram or dual port ram.

Now lets see how fast we need this ram to be:
We get 320*240*60 pixels per second which is a pixel clock of 5 megahertz. Thats a needed ram access time of 200 nanoseconds if the fpga has got a ram bus width of at least our needed 16 bits - no problem for sram which goes down to 50 nanoseconds without any problems...

Ok, now lets see how i would build our machine. Please corret me if i am wrong on something:

First we pick an FPGA with a little more than double the required ram space to make things a bit easier.
First we divide our ram into pieces:
ri1: 300 kb of raw input frame buffer 1
ri2: 300 kb or raw input frame buffer 2
ro1: 75 kb for our output frame buffer 1
ro2: 75 kb for our output frame buffer 2
sh0: 300 kb of raw input frame buffer for shutter images

We use three general purpose io pins on our fpga - one to sync on the clock and two for the two data lines which come out of the sensor.
We get our data from the sensor in words, which are grouped into lines, which are again grouped into half frames.
 We need to load each word into a little buffer made of flip-flops. When a buffer is full, we write it out to ram and fill a second buffer while the first one writing out. We always use one word bufer to fill it with ad data while we push the others contents to ram. This allows us for pushing the data out into ram continuously and letting it sit there for a bit.

When ri1 is full after the sensor transmitted a frame and we pused it into our ram buffer pixel by pixel, we continue to fill ri2 while we work with the data in ri1. When we are finished with working with the data in ri1 (translating it into a output frame), we can start to overwrite it with new data, while now working with ri2 and so on...
fill ri1
work with ri1 and fill ri2
work with ri2 and fill ri1 (overwerwrite ri1)
work with ri1 and fill ri2 again (overwrite)....
We have always got one input ram to work with (translate) and one to write into.

Now lets see how we work with data:
Our goal is to produce a useful output image for vga which has some sort of intensity information for each pixel. We said we use 256 levels of intensity for the output (colors or just whatever you want).
Lets use the same technique as with the raw input buffer rams.

we alwas fill one output frame buffer with data from one input frame buffer (by translating pixel by pixel). The other output frame buffer is being red by our VGA code at the same time (for screen display or whatever) and the other input buffer is being filled with raw data from the sensor a the same time. But we dont care about this until we are finished with translating the frame and have to switch buffers.

Read from ri1 (while our raw input parser writes into ri2) -> translate -> write into ro1 (while our output core shows pixels in ro2 to the screen)
Read from ri2 (while our raw input parser writes into ri1) -> translate -> write into ro2 (while our output core shows pixels in ro1 to the screen)
and so on...


We have a continuous flow of data through our machine.

Now lets look at our translation:
Each pixel in the current read-scheduled input buffer (the one which is not being overwritten with sensor data right now) has an according pixel in our write scheduled output buffer (the one which is not being red out to the screen by our VGA core right now).

Of course we could just scale down our 16 bit value to 8 bit and display it. But this would not result in a good image because our eyes cant see this fine kinds of gradients and our displays probably cant display them.

The information in an average input pixel contains some noise (from surrounding temperature,...) which is completely meaningless, then some valuable data which tells us important stuff about the objects we are looking at and then some range which never gets triggered, because we dont have a hot enough objects in the scene. We need to find this narrow band of meaningful variation in the values of your images.

So our 16 bit values of decimal meanings between 0 and 65k each contain information of differnt kinds:
Fact: value is >= 65k - never triggered, tells us nothing
Fact: value is >= 60k - never triggered, tells us nothing
Fact: value is >= 55k - never triggered, tells us nothing
Fact: value is >= 50k - never triggered, tells us nothing
Fact: value is >= 45k - never triggered, tells us nothing
Fact: value is >= 40k - valuable info
Fact: value is >= 35k - valuable info
Fact: value is >= 30k - valuable info
Fact: value is >= 25k - valuable info
Fact: value is >= 20k - almost certainly due to noise, tells us nothing
Fact: value is >= 15k - almost certainly due to noise, tells us nothing
Fact: value is >= 10k - almost certainly due to noise, tells us nothing
Fact: value is >= 5k - almost certainly due to noise, tells us nothing
Fact: value is >= 0 - almost certainly due to noise, tells us nothing


Lets find out what the range carrying our valuable info is (in this case the variation of the values between 25k and 40k, since almost all pixels are bigger than 20k, and smaller than 45k. The fact that they are bigger than 25k and smaller than 45k is predicatable and thus carries no information). We need to find the low and high treasholds of valuable information for each frame or pixel.

The upper treshhold is no problem: We just reserve some flip flops for values of some statistics work in the fpga and look at the data to find out, what is the maximum of the last few frames for most of the pixels. This kinds of calculations are wehre fpgas get into their really strong side, so no problem for us.

Finding the noise is no problem too: We just take a reference picture while our shutter is in front of the sensor and wirte it into sh0, since the variation in noise is big from pixel to pixel. Maybe a general treshold for a whole frame would be sufficient too, but i am not sure about this and ram is so cehap, that we can afford it without a problem.

The rest is simple. We pull a pixel from our input buffer and subtract the noise which we know from sh0.
Then we adjust our scaling from 65k to 256 by using our upper treshold and scale.

This will give us a good image. Not an awesomely perfect image, but a good one and 60Hz and 320x240.
We can add stuff like a thermister for absolute readings and more stuff, if we want of course.

The question is now, how much FLIR charges for a replacement sensor assembly and lens. An FPGA board for easy use is probably ceaper than 100 USD and when we have the code once, we can upload it to Github and share :-) ?

Of course you can also just use half the ram and not my approach of always saving one part of it for writing and one for reading, but the cool thing is, that this design will later be easily upgradable for a shutter wheel that constantly calibrates the sensor instead of an intruding calibration phase which stopps your image. The price of using a shutter wheel will probably be dropping the usable frame rate from 60 to 30 hertz... But yeah, still better than stopping the picutre for more than a second! Plus: You can easily add the visible light enhancements if you start out with a design which simplifies timing and racing conditions at the price of ram.

So: Sorry for the wall of text and maybe partially difficult to understand post... Just wanted to share some thoughts - who knows, maybe this helps someone to get a few ideas?
Any thoughts?
Any obvious missassumptions on my side?
Has anyone here ever bought replacement parts from FLIR?
Maybe I should give them a call and ask for replacement sensors?
 

Offline mikeselectricstuffTopic starter

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Re: Flir E4 Thermal imaging camera review
« Reply #142 on: October 15, 2013, 10:20:18 pm »
I highly doubt they would sell sensors other than in large qtys to OEMs. And they would probably require an export license to ship out of the US.
As the sensor runs at the same framerate as an LCD, you probably don't need to double-buffer anything as the LCD frame sync can be the same as the input rate.You could delay the LCD horizontal sync to cover processing delays if necessary.
The minimum you would need is just over 1mbit for the flat-field compensation, unless you got clever and just stored deltas from a global avarage value, which could reduce the bit depth needed - I would imagine flat-field variation is a fairly small proportion of the 14 bit range.
And also a line buffer, as the lines come in bursts that last half a line time ( the data comes in a burst of half a line duration - this is so the same format can accommodate 640 pixels wide).
As everything is synced and the fill speed is faster than the speed emptying to the LCD, you shouldn't need to double-buffer it.

The smallest Spartan 6 to do it in internal RAM would be would be the X45, which is expensive and BGA only,  however as data rate isn't too high, a smaller FPGA with external SRAM or SDR SDRAM would probably be much cheaper.
 
 It will be interesting to see what the raw uncorrected display looks like.
You may need some need some filtering - simplest maybe an IIR filter, which needs a second full-frame buffer.
I suspect they downsample from the 60fps to reduce noise due to low output from a small lens - their 60fp imagers use a larger lens.
 
I also wonder if you could use a fast ARM that has a camera interface and DSP core and do it in software, with some carefully crafted assembler and a small CPLD or FPGA to do some preformatting. 
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Offline Fraser

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Re: Flir E4 Thermal imaging camera review
« Reply #143 on: October 16, 2013, 10:26:50 am »
Not wanting to place a damper on this superb investigation into the E4........ I do have a small concern that FLIR may decide 'enough is enough' and contat Mike via their legal team to suggest he stop publicly reverse engineering their IPR liable product. There may be a very good reason why we do not see such tear downs of FLIR equipment on the internet. One is that few people want to rip apart a very expensive piece of equipment, and the other may be the fear of action under US DoD regulations, ITAR etc. I fall into the later category, as I value my job !

Mike, I hope you continue with your excellent work on the E4 operating princiles and high level design. I feel sure you are already aware of the potential interest that may be taken in you activities by the FLIR legal bods.

Take care.
 
« Last Edit: October 16, 2013, 10:29:08 am by Aurora »
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Online Psi

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Re: Flir E4 Thermal imaging camera review
« Reply #144 on: October 16, 2013, 10:33:58 am »
Not wanting to place a damper on this superb investigation into the E4........ I do have a small concern that FLIR may decide 'enough is enough' and contat Mike via their legal team to suggest he stop publicly reverse engineering their IPR liable product.

fear of action under US DoD regulations, ITAR etc.

I doubt Flir could do anything, Mike isnt in the USA
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Offline CzokNorris

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Re: Flir E4 Thermal imaging camera review
« Reply #145 on: October 16, 2013, 10:38:43 am »
Ok, the double frame buffer was a stupid idea... Waaay to complicated.

It seems, that they have lifted some of the regulations for export of sensors most countries in Europe, Australia and to Canada...

This is rather interesting: http://www.flir.com/cvs/cores/view/?id=51948 They even provide some basic specs and pinouts...
 

Offline Fraser

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Re: Flir E4 Thermal imaging camera review
« Reply #146 on: October 16, 2013, 10:45:08 am »
ITAR is international and the UK has signed up to the Wassenaar arranagement. UK authorites may act on an offiial complaint.

http://en.wikipedia.org/wiki/Wassenaar_Arrangement

Breach of IPR is also an international law knowing no boundaries between the USA and UK.
« Last Edit: October 16, 2013, 10:48:54 am by Aurora »
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Offline BravoV

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Re: Flir E4 Thermal imaging camera review
« Reply #147 on: October 16, 2013, 10:46:02 am »
I doubt Flir could do anything, Mike isnt in the USA

You are forgetting this ... "When US gov says jump, UK gov will ask how high ?"   >:D
« Last Edit: October 16, 2013, 10:49:16 am by BravoV »
 

Offline amyk

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Re: Flir E4 Thermal imaging camera review
« Reply #148 on: October 16, 2013, 11:40:21 am »
Not wanting to place a damper on this superb investigation into the E4........ I do have a small concern that FLIR may decide 'enough is enough' and contat Mike via their legal team to suggest he stop publicly reverse engineering their IPR liable product.

fear of action under US DoD regulations, ITAR etc.

I doubt Flir could do anything, Mike isnt in the USA
Also don't forget Mike has already torn down (and repaired!) a 320x240@60Hz one from FLIR before, and another one. (Does this mean you have three thermal imaging cameras now?! :o)
 

Offline EEVblog

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Re: Flir E4 Thermal imaging camera review
« Reply #149 on: October 16, 2013, 11:44:43 am »
There may be a very good reason why we do not see such tear downs of FLIR equipment on the internet. One is that few people want to rip apart a very expensive piece of equipment, and the other may be the fear of action under US DoD regulations, ITAR etc.

FLIR have confirmed they are sending me an E8 for review, after all, it likely costs them no more than the E4  ;D
But I won't be taking mine apart, not because I fear FLIR or some lawyer bots, but because I fear Murphy  :o
It didn't look trivial to take apart and put back together...
 


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