The key to tvb's PIC cleverness is that he uses the signal-to-be-divided as the processor clock. Then he simply uses instruction loops to count off the desired number of clock cycles and toggle an output pin. So it is perfectly synchronous, and has no uncertainties from clock re-synchronization or interrupt latency, etc.
Hence the attraction for timing applications where jitter has to be minimized.
I like the approach for general-purpose dividers. As long as the input signal is in the range of the PIC input clock spec (<20 MHz, say), and as long as the divisor is not too small, then it is easy roll an arbitrary divider into a small 8-pin package. You just have to be comfortable tweaking the PIC assembly code to get the right division ratio.
For a recent PLL, I used one PIC to divide the 10 MHz VCO signal by 500, and a second PIC to divide the 3.840 reference by 192 in order to get 20 KHz inputs to the phase comparator. Worked a treat.