Author Topic: Panasonic VP-3620A Logic Analyser service manual + teardown  (Read 626 times)

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Offline Scratch.HTFTopic starter

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Panasonic VP-3620A Logic Analyser service manual + teardown
« on: January 08, 2023, 12:44:28 am »
Due to limits per post, additional pictures will come day by day.

Summary of internals:
CPU is an 8085 (which corresponds to one of my most likely predictions)
No gate arrays or other custom ICs including for acquisition and video (which I predicted might be present but fortunately not) but high speed 74S logic has been used without any BPROMs (or programmable logic) and the power supply has an unused -2V output for ECL termination - I also predicted that ECL devices might be present but are not
All ICs were available off the shelf including ICs on an epoxy dipped control module on the power supply and can be second source (I found that the NEC 7210 is an enhanced 8274 and the two epoxy dipped ICs are MB3759/TL494)
CPU ROM/RAM size is 28/12 KByte respectively (which was way below my prediction of 128-256 KBytes of ROM); Display RAM card has 16 KBytes of SRAM, Memory card has 4 KBytes of acquisition SRAM (a total of eight 1 Kbit * 4 devices for the 32 fitted channels), Option Interface card has 8 KBytes of SRAM and fitted option cards (u-CPU and RS-232-C Analyser) each have 8 KBytes of ROM
GPIB/RS-232/printer interface options might have been available
Oscillators are 6.144 MHz for the CPU running at half frequency and for baud rate generation, 8.8 MHz for video and 20 MHz for logic timing measurement
Display RAM board (which has discrete logic for the video controller) has provision for a 8251 RS-232 controller and 75188/75189 line drivers/receivers with an arrangement of 74LS90+74LS393 clocked by the 6.144 MHz CPU oscillator for selecting the baud rate for the 8251 serial controller via a bank of DIP switches (the unmounted 74LS90/74LS393/8251 devices were identified by checking the pin configurations against three vintage data books)
For a high state, unused inputs on the TTL ICs are floating, but is generally not permissible for (C)MOS devices which do not have an internal pullup/pulldown resistor which can be programmable in certain devices
u-CPU card (which can perform program disassembly for a specific CPU based on bit width and the card ROM program) has 1 KByte of SRAM for units built for an 8 bit CPU and double (U17/U18 are the same as U15/U16 with U7 being the same as U5) for 16 bit

For a unit from the early to mid-80s, 20 MHz/32 channel/1024 samples would be considered an entry-level unit - I am after schematics for the VP-3620A.
If it runs on Linux, there is some hackability in it.
 

Offline Scratch.HTFTopic starter

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Re: Panasonic VP-3620A Logic Analyser service manual + teardown
« Reply #1 on: January 09, 2023, 12:16:15 am »
One more set of photos to go...
If it runs on Linux, there is some hackability in it.
 

Offline Scratch.HTFTopic starter

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Re: Panasonic VP-3620A Logic Analyser service manual + teardown
« Reply #2 on: January 10, 2023, 12:17:25 am »
The final set of photos...
If it runs on Linux, there is some hackability in it.
 


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