Trigger JitterThe datasheet specifies the trigger jitter as follows:
• CH1～CH4: < 10 ps rms (typical) ，≥ 6 div Vpp sine，2.5 mV/div ~ 10 V/div
• EXT: < 200 ps rms
The EXT trigger jitter is not exactly stellar at <200 ps RMS – but then again this is a classical analog (comparator) trigger and not the fully digital trigger system that we get when using one of the input channels as trigger source.
Now let’s verify this with a 300 MHz sine signal from an OCXO-driven AWG (SDG7102A), fed into channels 2 and 4 of an SDS2504X HD via a 12.4 GHz resistive power splitter. We can observe the jitter in the trigger channel as well as a not triggered channel, where both are using different ADCs, hence are completely unrelated.
The high quality 300 MHz sine signal has been chosen for its fast edges and low inherent jitter – after all we want to characterize the DSO and not the signal source. See the attached screenshot which has been taken after more than one minute running with infinite persistence:
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SDS2504X_HD_Trigger_Jitter_300MHz_1m
At a timebase of 500 ps/div, we can see the peak to peak jitter in the triggered as well as the non-triggered channel after more than one minute at infinite persistence. Well, at that timebase we see – pretty much no jitter at all.
The jitter measurements are as follows:
Triggered channel: 13.2 ps pk-pk, 2.018 ps rms;
Un-triggered channel: 17.7 ps pk-pk, 2.54 ps rms;
Skew Ch.3-Ch.4: 15.1 ps pk-pk, 2.317 ps rms;
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