SPI supports 4 modes.
Mode 3 is clock idle state high, sample on rise edge, clock out on falling edge.
So data edges will be in synch with clock falling edge, and sampled on next rising clock edge.
Most commonly used mode is mode 0. Means clock is idle low.
When you use CS too it is obvious what framing is. You only need to set what clock sampling edge is.
With only 2 ch used, you need to set framing by timeout.
for mode 3 you need to set clock rising and set proper timeout