See attached for 40MHz SPI signal on analog + logic input, seems to work quite well other than a bit of jitter.
One issue is there is a ~150ns offset between the analog channels at the top, and the same digital channel on the bottom. I'm thinking this is worth reporting as a bug.
One possible workaround for this would be adjusting the analog channel offsets, so all are -150ns. But that is a lot so it may not be possible.. will check.
Temperature is 55C on the chip and 45C on the bottom of the board (in open air at 23C). It will get a bit worse inside the case, but would likely be fine without a heatsink.
By completely disconnected you mean the minimum required for the Scope to detected and activate the logic analyzer, correct? The microcontroller that was added for the LEDs, is it active when you detect the noise?
Yeah thats right, nothing connected to the Rigols 50-pin port at all. Sometimes the LA will run for a bit, even after unplugging the pod (some bug or timing detection). But you can manually short pin 1 to ground too, to enable the LA and test this way as well. I suppose in Rigols design case it doesn't matter, as you either have all channels connected, driving the inputs hard, or not connected and LA disabled on the screen.
Good point about the micro though, I could see it having some effect.
100% certain on D11 and D14? they break the pattern of all the others
It is an odd pattern, and it would make more sense if it was N, P, N, P repeating consistently. Actually now that you mention it, the bit order does have a "logical" pattern: if you skip two pins, it does go from D0, D1 .. to D7, and the same for D8 to D15. At first I thought it was completely nonsensical.
I will go over them again tomorrow now that I've modified my pod to swap D4 and verify the pinout (having the resistor pack made it easier, see photo below).