Rigol DS1074Z-S / DS1104Z-S Signal Generator Daughterboard

[sub205]

Hello,

does anyone know where to get the board that is missing in the normal Z-series and know it it'll work with the correct license in f.e. a DS1054Z ?


Kind regards,
Stephan

[nixfu]

I seem to remember that we learned from the teardowns that you can't add it on after the fact because the main boards are different.

[smgvbest]

main boards are the same.  it plugs into one of those headers Dave did not know what it was for and the output BNC's plug in to a separate board.  Here's a picture of my MSO1074Z-S same main board with the 2 daughter boards for the source generator.

The other thing that would be need it the button added to the front of the unit.

[sub205]

Adding a button is not the biggest problem. But getting this board somehow ... 

Spent several hours looking for it, the correct description or rigol spare parts in general... 

[Fred27]

The first thing to check would be to see if transplanting one from a DS1074Z-S to a DS1074Z works. Has anyone got both and is willing to try?

My guess is that the price of the spare part would be more than the difference between the two models (or at least close enough to not be worth doing).

[sub205]

It would also be nice so see which components are on this board, and maybe we can do some reverse engineering on it ...

[Howardlong]

Right now, you could prolly sell your DS1054Z on ebay at close to retail price, and buy a slightly more readily available DS1074-S.

[smgvbest]

What @Howardlong Said.

That is probably the most economical way to do it.

[sub205]

The Sig-Gen is nice to have, but not necessary.

In Germany, the 1054Z currently is ultra cheap, the 1104 is nearly twice the price.
You can get a 1054Z for 300€ (+vat), which is about 350$

The 1074Z-S is about 740$ ... excl vat.
So i currently don't see the point in paying over twice as much just to get 2 signal sources which are unpractically to operate because of a user interface made for a scope and not for a siggen.

Getting a spare siggen-board for, lets say, 150$ would be a much better option.

[pickle9000]

So being this scope is so popular how soon before kit's start showing up on ebay? It's a redundant question but at some point someone will see if it can be done, and if it can start selling them for 40 bucks a pop.

You gotta feel sorry for Rigol (or perhaps they are happy) every part of this scope will be picked apart. I'm sure someone is out there now drawing up schematics.

[sub205]

yes, and i'm searching for this guy. Like morpheus searched for neo ... *lol*

rigol would not be so popular without their good hardware and software. and i don't think professional companies that order quantities of this scopes go for a 1054 and patch the licenses for a 1104, they buy the real one at first. the hobbiists that patch their equipment are only somewhere between 5% - 10% of the entire customers of rigol. And, as Microsoft realized, these people are good for the company because they like what they get and spread this opinion to others, f.e. their bosses, friends, relatives ...
so, after all, it's a good deal for rigol.

I do not think they were able to sell 100MHz scopes for the price of 50MHz scopes when they lose money doing this, so the entire hardware/software is refinanced by the smaller price.

Every good finance planner  / analyst knows this aspects and uses it in his calculations.

[jlothian]

Hmm. This photo of the mixed-signal version's innards is very interesting. My fairly-early non-MSO has obvious layouts for a separate FPGA and memory chip for the mixed signal version, which I see seem to have disappeared on yours (see https://www.flickr.com/photos/jameslothian/14444152788/in/set-72157645222357567). Perhaps this explains why using the logic channels robs you of one or two of the analog ones. It looks as though Rigol decided that a 'full fat' logic analyser implementation with separate FPGA & memory was going to be too expensive, and went for a cheaper implementation instead. All very intriguing.

James

[smgvbest]

There is defineately a difference between the DS1000 boards 1.01 and my 1.03 board

Here's a HR view of the SG Board showing an Altera FPGA in use on it
You also notice on both yours and mine they are label DS2K and DS2000 FGBoard so can we take a guess and assume this is the same board used in the DS2000's  would save them money by simply using the same board for both scopes.

[lukier]

There is defineately a difference between the DS1000 boards 1.01 and my 1.03 board

This is very interesting. What is exactly below the SigGen board on your 1.03 board? I see 3 differential pairs running to the main FPGA. How the logic analyzer works in the new board revision?

From various teardowns I've assumed there is an extra Xilinx FPGA, DDR SDRAM, some RC network and logic probe connector, quite a lot missing components.

In this photo however it looks much different, so maybe (it's a long shot) it should be much easier to update DS1054Z to MSO10x4Z (e.g. solder some RC, connector, reflash firmware).

[pickle9000]

This is very interesting. What is exactly below the SigGen board on your 1.03 board? I see 3 differential pairs running to the main FPGA. How the logic analyzer works in the new board revision?

From various teardowns I've assumed there is an extra Xilinx FPGA, DDR SDRAM, some RC network and logic probe connector, quite a lot missing components.

In this photo however it looks much different, so maybe (it's a long shot) it should be much easier to update DS1054Z to MSO10x4Z (e.g. solder some RC, connector, reflash firmware).

The logic analyzer stuff (that's missing) can be seen in Daves teardown video. My guess about the hardware identifiers are the Hardware Version jumpers and the SP Version jumpers.

[lukier]

The logic analyzer stuff (that's missing) can be seen in Daves teardown video. My guess about the hardware identifiers are the Hardware Version jumpers and the SP Version jumpers.

But that's exactly my point. In Dave's video #674 (16:47) there must be a different revision of the main board because on the left where the SigGen daughterboard would be you have an empty footprint for big Xilinx FPGA and under the SigGen footprint for some DDR SDRAM perhaps. The same on Connor Wolf teardown video.

However in the photos above there is something completely different. I found this photo of MSO1104Z on some Chinease website:


It seems like differential pairs are going straight to the SCSI connector from the main FPGA (don't know what's on the other side of the board though).

Now the questions are:
- maybe MSO version has not only different jumpers and firmware, but larger main FPGA (with the same package) - this would be a dealbraker then,
- there must be some active circuitry in the probe pod, I suspect some DAC, comparators and RC elements - this should be possible to replicate

I remember the Agilent thread where people replicated VGA option and it would be great to be able to "upgrade" DS1054Z to MSO1104Z with "doable" hardware modifications (e.g. without buying and soldering big BGA FPGA).

[pickle9000]

The logic analyzer stuff (that's missing) can be seen in Daves teardown video. My guess about the hardware identifiers are the Hardware Version jumpers and the SP Version jumpers.

But that's exactly my point. In Dave's video #674 (16:47) there must be a different revision of the main board because on the left where the SigGen daughterboard would be you have an empty footprint for big Xilinx FPGA and under the SigGen footprint for some DDR SDRAM perhaps. The same on Connor Wolf teardown video.

It seems like differential pairs are going straight to the SCSI connector from the main FPGA (don't know what's on the other side of the board though).

Now the questions are:
- maybe MSO version has not only different jumpers and firmware, but larger main FPGA (with the same package) - this would be a dealbraker then,
- there must be some active circuitry in the probe pod, I suspect some DAC, comparators and RC elements - this should be possible to replicate

I remember the Agilent thread where people replicated VGA option and it would be great to be able to "upgrade" DS1054Z to MSO1104Z with "doable" hardware modifications (e.g. without buying and soldering big BGA FPGA).

- I don't see anything on Dave's picture that indicates there is a big difference, relocation of components but it's hard to tell from that bit. 
- The firmware is already in the machine for the logic analyzer. I believe the entire scope family used the same firmware update. It would probably be worth the effort to ask mso, sig gen persons to see what the Hardware Version jumpers and the SP Version jumpers are set to.
- I thing the biggest issue is who has the skill / gear to install the missing components.

I don't think Rigol did anything here in particular to prevent populating the board and having it work. If I new what the parts where I'd have a crack at it just for the heck of it.

[lukier]

- I don't see anything on Dave's picture that indicates there is a big difference, relocation of components but it's hard to tell from that bit. 
- The firmware is already in the machine for the logic analyzer. I believe the entire scope family used the same firmware update. It would probably be worth the effort to ask mso, sig gen persons to see what the Hardware Version jumpers and the SP Version jumpers are set to.
- I thing the biggest issue is who has the skill / gear to install the missing components.

Check this quick and dirty comparison picture I've made. On the top you have a frame from Dave's teardown video, on the bottom the image that smgvbest posted in this thread.

There is a massive difference in the LA section! Where did the big FPGA and DDR SDRAM BGA footprints went? Not under SigGen board, as the image from Chinese website I posted above shows. Maybe on the other side. But the differential pairs from the SCSI connector run to the main FPGA (at least three of them).

I suspect that Rigol managed to squeeze the LA functionality into the main FPGA (that's why when you enable each 8 bit group you loose one channel - no extra memory chip), maybe MSO series have higher density FPGA populated (with the same package) to allow this extra logic.

If not, and as you say, the firmware is the same, then to enable LA on DS1054Z it only needs switching the HV/SP jumpers and soldering 68 pin SCSI connector (optimistic scenario).

smgvbest: Could you do a teardown of the LA probe pod?

[pickle9000]

- I don't see anything on Dave's picture that indicates there is a big difference, relocation of components but it's hard to tell from that bit. 
- The firmware is already in the machine for the logic analyzer. I believe the entire scope family used the same firmware update. It would probably be worth the effort to ask mso, sig gen persons to see what the Hardware Version jumpers and the SP Version jumpers are set to.
- I thing the biggest issue is who has the skill / gear to install the missing components.

Check this quick and dirty comparison picture I've made. On the top you have a frame from Dave's teardown video, on the bottom the image that smgvbest posted in this thread.

There is a massive difference in the LA section! Where did the big FPGA and DDR SDRAM BGA footprints went? Not under SigGen board, as the image from Chinese website I posted above shows. Maybe on the other side. But the differential pairs from the SCSI connector run to the main FPGA (at least three of them).

I suspect that Rigol managed to squeeze the LA functionality into the main FPGA (that's why when you enable each 8 bit group you loose one channel - no extra memory chip), maybe MSO series have higher density FPGA populated (with the same package) to allow this extra logic.

If not, and as you say, the firmware is the same, then to enable LA on DS1054Z it only needs switching the HV/SP jumpers and soldering 68 pin SCSI connector (optimistic scenario).

smgvbest: Could you do a teardown of the LA probe pod?

Looks like the regulators are in the same relative position, but populated. The large devices are probably on the back side of the board.

[lukier]

Looks like the regulators are in the same relative position, but populated. The large devices are probably on the back side of the board.

Highly unlikely, it is difficult to hide such big FPGA package, there would be fanout vias and decoupling capacitors on this side. Also, on V1.01 board this FPGA has hooks for heatsink (similar to the main FPGA) and this wouldn't fit on the other side (LCD display/keypad in the way). This also doesn't explain why LA connector traces used to go to this FPGA and on V1.03 they go to the main FPGA directly.

The regulators, I suspect, are providing localized +-V power for the logic pod DAC.

Can any of the MSO1000Z series users (V1.03 board) check that their main FPGA is XC6SLX25 (as seen in DS1054Z teardowns) or not and what's inside the logic pod.
Anyone got DS1054Z from a recent production run? Is it still V1.01 main board?

[SeanB]

Probably hidden under the daughter board, and they likely found the ASIC did not need a big heatsink, so it was replaced with a much smaller one. Possibly somebody will pop that board off and see what is under it, it could be using that board to hold the heat sink , and if the board is not present then they use a different one and the spring clip.

[lukier]

Probably hidden under the daughter board, and they likely found the ASIC did not need a big heatsink, so it was replaced with a much smaller one. Possibly somebody will pop that board off and see what is under it, it could be using that board to hold the heat sink , and if the board is not present then they use a different one and the spring clip.

It seems there isn't anything under the SigGen daughter board:



I browsed the forum and it seems that all DS1000Z owners have board version (as reported by the software) 0.1.1 and something else for MSO1000Z series. If someone has DS1000Z with board revision different than V1.01 aka 0.1.1 let us know.

I suspect that the board used for DS1054Z (as seen in various teardowns, even the genuine DS1104Z by Connor Wolf) is an older revision when Rigol had a different idea for LA functionality (separate FPGA and memory), maybe it didn't work properly or was too expensive and therefore MSO1000Z series uses new revision (V1.03), possibly with a bigger FPGA (XC6SLX25 on DS1054Z) with signals from the logic pod connector routed directly to the main FPGA, but sacrificing one channel for every LA 8 bit group enabled (as they use the same memory). They probably had some V1.1 boards already manufactured, programmed pick and place lines and so on, so all DS1000Z series use this revision.

Unfortunately, this means that it is pretty much impossible to upgrade DS1000Z to MSO with minor hardware hacks. Too bad because the price difference between DS1054Z and MSO1074Z is huge, especially when taking into the account what is different: maybe slightly larger FPGA (XC6SLX45?), a couple of regulators, serial termination resistors, 68 pin SCSI type connector and the logic probe. Definitely not worth extra 334 GBP as Dave mentioned in the recent EEVBlab.

[smgvbest]

You can see some major differences in the V1.01 and V1.03 boards.   I'm not in a position to reopen my scope to find out so all I have is HR pics I took.   There are not 3 differential pairs coming from the LA connector as was said in another photo I have you can see it is 9 traces.  That I can confirm on my scope they do indeed go to the LA.  There are no other traces coming from it on the top side of the board.   Is it possible they used blind via's for the fan out on the other side of the board and that's why you can not see them on the top side?   Since you loose ADC channels using the LA I would expect it to go to the ADC chip but these traces on top do seem to go the FPGA

I posted all my images on my MSO1074Z-S here -> http://kbobs.org/gallery/thumbnails.php?album=11 if anyone what to look at everything

I would say any thing until one of use can get a bottom side picutres of both the DS1000Z and the MSO1000Z boards at the same board levels if possible is purely conjecture.  we do not know until it can be verified visually what rigols done.   I was barely able to afford my MSO1074Z-S and do not want to risk opening it again.  Otherwise I'd be happy to crack it open.

[lukier]

You can see some major differences in the V1.01 and V1.03 boards.   I'm not in a position to reopen my scope to find out so all I have is HR pics I took.   There are not 3 differential pairs coming from the LA connector as was said in another photo I have you can see it is 9 traces.  That I can confirm on my scope they do indeed go to the LA.  There are no other traces coming from it on the top side of the board.   Is it possible they used blind via's for the fan out on the other side of the board and that's why you can not see them on the top side?   Since you loose ADC channels using the LA I would expect it to go to the ADC chip but these traces on top do seem to go the FPGA

I posted all my images on my MSO1074Z-S here -> http://kbobs.org/gallery/thumbnails.php?album=11 if anyone what to look at everything

I would say any thing until one of use can get a bottom side picutres of both the DS1000Z and the MSO1000Z boards at the same board levels if possible is purely conjecture.  we do not know until it can be verified visually what rigols done.   I was barely able to afford my MSO1074Z-S and do not want to risk opening it again.  Otherwise I'd be happy to crack it open.

Thank you for the pictures. I understand your concern when it comes to completely disassembling your MSO

I doubt you loose ADC channels because LA signals go there, that wouldn't make much sense, no need to have 8 bit resolution on the digital signals. On the top side I see three differential pairs (why 9 traces?) coming from the LA connector to the main FPGA. I suspect the rest (13 pairs?) is going on the other side or internal layers. Probably in the logic probe pod there are comparators with differential outputs (for noise immunity) that go to Spartan-6 differential inputs.
One channel disabled with each 8 bit LA group is probably just the memory limit issue. On V1.03 board there is only one FPGA with one DDR SDRAM memory and each ADC channel requires 8 bit times something for samples. Thus, when enabling 8 bit LA group memory for these samples is required and one of the ADC channels has to give up this space. They could probably come up with some smarter memory management (e.g. reducing the number of samples for ADC instead of disabling one/two of the channels).

Anyway, you are completely right, we won't be 100% sure until someone takes a high-res photo of the other side of the MSO (V1.03) board 

BTW What are your impressions on the MSO functionality?

[smgvbest]

If you look at this photo at full resolution
http://kbobs.org/gallery/albums/userpics/10001/MSO1074Z-S_008.JPG

you can see what looks like 3 groups of 3 traces.  now it could be a trick of light but so could the other image making it look like a differential pair. 

So far I've used it for some SPI troubleshooting and it worked fine. I was able to see my problem was with my CS and once I fixed that everything worked.  Now I could have done the same with the 4 channel but hooking up the test pod was easy.

I've had a USBee LA for along time and like it but having to have a PC near by is a pain so just the convenience of it was worth it.
I didn't play with the decoding but fully intend to.   Right now I'm working on a power supply for my CNC router and a new controller. So haven't had the need for the LA again yet.  once my bench is clear I'll break out a board and try some of the decode stuff and see.