Mixed hardware/software info
Used interfaces:
I2C_0: I2C nvram, 800h bytes (o-scope settings)
UART_0: keyboard/LED
SPI_0: 8 bit bus xilinx<->cpu
SPI_2: contol bus (multiple chip select)
CS0: SPI NVRAM (loader + calibrate ("/sys/CalData.bin") + copy "/sys/OptionData.bin" + copy "/sys/OptionPara.bin" + other)
CS1: actel (cpld). Commands (two byte):
1,x - Select device for CS2
x:
0 - ADF4360 (3 byte/packet)
1 - ADC Controll (3 byte/packet)
2 - AD5207 x 2 (3 byte/packet, 20 bit)
3 - frontend control (4 byte/packet)
4 - Load Xilinx firmware
6 - Load Altera firmware + DG settings load
7 - ?? (total offilne?)
5,x -> ADC control (02 - reset bit, 01 - ? bit)
6,0 -> 2 byte answer, second - low part of MB version
7,0 -> 2 byte answer, second - high part of MB version
8,0 -> 2 byte answer, low tetrade of second - CPLD version.
B,x -> Load Xilinx control (answer - status bits)
D,x -> Load Altera/DG control
command B,D:
x=0 - reset
x=1 - no reset, start loading
CS2: common stream (see actel command 01)
Front End Control 4 channel, 4 x SN74AHC595 (HA595):
0x01 - DC coupling (0 - AC), cosmo rele
0x02 - attenuator rele
0x04 - bandwidth bit 1
0x08 - bandwidth bit 2
0x10 - ?? (used only as 0x10000000)
0x20 - vertical offset bit 1
0x40 - Amp. select
0x80 - vertical offset bit 2
Separate Bit:
0x10000000 - ? HC4053 on CH4?
Calibrate cirquit(?):
dac860+HC4051 - control from xilinx registers C2/C3 (dac serial + mux)
DMA Channels:
0 - SPI_0
4 - NAND FLASH
CPU pin settings (pin no - as in datasheet):
Pin 1, SSP2_MOSI pin function selection: BANK2_PIN17 00= ssp2_cmd;
Pin 2, SSP0_DATA2 pin function selection: BANK2_PIN02 00= ssp0_d2;
Pin 4, SSP2_SS0 pin function selection: BANK2_PIN19 00= ssp2_d3; (SPI2/CS0?)
two var:
Pin 6, SSP0_DATA6 pin function selection: BANK2_PIN06, 11= GPIO. (SPI)
Pin 6, SSP0_DATA6 pin function selection: BANK2_PIN06 00= ssp0_d6;
Pin 7, SSP2_SS1 pin function selection: BANK2_PIN20 00= ssp2_d4; (SPI2/CS1?)
Pin 8, SAIF1_SDATA0 pin function selection: BANK3_PIN26 11= GPIO. (some gpio interrupt)
Pin 18, SSP2_SS2 pin function selection: BANK2_PIN21 00= ssp2_d5; (SPI2/CS2?)
Pin 26, AUART2_TX pin function selection:BANK3_PIN09 11= GPIO (USB-Device)
Pin 27, ENET0_RX_EN pin function selection: BANK4_PIN02 00= enet0_rx_en
Pin 29, ENET0_TX_EN pin function selection: BANK4_PIN06 00= enet0_tx_en
Pin 30, AUART0_RX pin function selection:BANK3_PIN00 00= auart0_rx;
Pin 34, SAIF0_LRCLK pin function selection: BANK3_PIN2111= GPIO. (some for FPGA)
Pin 35, ENET0_TXD1 pin function selection: BANK4_PIN08 00= enet0_txd1;
Pin 37, ENET0_TXD0 pin function selection: BANK4_PIN07 00= enet0_txd0;
Pin 38, AUART0_TX pin function selection: BANK3_PIN01 00= auart0_tx;
Pin 39, ENET0_MDIO pin function selection:BANK4_PIN01 00= enet0_mdio
Pin 45, ENET0_RXD0 pin function selection: BANK4_PIN03 00= enet0_rxd0;
Pin 47, ENET0_RXD1 pin function selection: BANK4_PIN04 00= enet0_rxd1;
Pin 54, ENET0_MDC pin function selection BANK4_PIN00 00= enet0_mdc
Pin 66, AUART0_RTS pin function selection: BANK3_PIN03 00= auart0_rts;
Pin 68, PWM2 pin function selection: BANK3_PIN18 11= GPIO (DG detect ?)
Pin 70, AUART0_CTS pin function selection: BANK3_PIN02 00= auart0_cts
Pin 81, AUART1_RX pin function selection: BANK3_PIN04 11= GPIO. (PXP)
Pin 82, AUART3_RTS pin function selection: BANK3_PIN15 00= auart3_rts;
Pin 84, PWM1 pin function selection:BANK3_PIN17 00= pwm_1; (beeper)
Pin 86, AUART3_TX pin function selection: BANK3_PIN13 00= auart3_tx;
Pin 90, AUART3_CTS pin function selection: BANK3_PIN14 00= auart3_cts;
Pin 98, AUART3_RX pin function selection:BANK3_PIN12 00= auart3_rx;
Pin 268, SSP0_SCK pin function selection: BANK2_PIN10 00= ssp0_sck;
Pin 270, SSP0_DATA0 pin function selection: BANK2_PIN00 00= ssp0_d0;
Pin 272, I2C0_SCL pin function selection: BANK3_PIN24 00= i2c0_scl;
Pin 274, SSP0_DATA3 pin function selection: BANK2_PIN03 00= ssp0_d3;
Pin 275, SSP0_DETECT pin function selection: BANK2_PIN09 00= ssp0_card_detect;
Pin 276, SSP0_CMD pin function selection: BANK2_PIN08 00= ssp0_cmd;
Pin 278, SSP0_DATA4 pin function selection: BANK2_PIN04 00= ssp0_d4;
Pin 280, SSP2_SCK pin function selection: BANK2_PIN16 00= ssp2_sck;
Pin 281, I2C0_SDA pin function selection: BANK3_PIN25 00= i2c0_sda;
Pin 282, SSP0_DATA7 pin function selection: BANK2_PIN07 00= ssp0_d7;
Pin 284, SSP0_DATA5 pin function selection: BANK2_PIN05 00= ssp0_d5;
Pin 288, SSP2_MISO pin function selection: BANK2_PIN18 00= ssp2_d0;
Pin 289, SSP0_DATA1 pin function selection: BANK2_PIN01 00= ssp0_d1;
Variables:
00007FF4 - dword flag "disable load settings"
00007FF8 - firmware version from loader
00007FFC - boot version
SPI NVAM MAP:
00000-70000: Bootloader
70000-76000: Unused ?
76000-76008: LA/DG Calibr (?)
78000-79800: /sys/OptionData.bin
79800-7A000: /sys/OptionPara.bin
7A000-7C000: /sys/_SYS_REG_CFG_0417.cfg
7E000-7F800: /sys/CalData.bin
7F800-80000: part of /sys/CalData.bin