@ManateeMafia
Actually, during further investigation I found out that I get 200.1 and 200.3 errors too (but not always - they are rarer than 200.2 error). Moreover, it is much more probable that I get these errors when I run test in "step" mode than in "continuous" mode. Strange...
I also made a comparison of my KEI2001 and KEI2000. I measured a stable 10V reference output:
-> KEI2000 (10V, MEDIUM speed = 1NPLC, no filter, 1000 samples)
average value: 10.04788 V
std dev.: 2.08 uV
min. / max. reading: 10.04787 V / 10.04788 V
-> KEI2001 (20V, 1NPLC, line sync, synchronous autozero, no filter, 404 samples)
average value: 10.048091 V
std. dev.: 7.86 uV
min. / max. reading: 10.04807 V / 10.04811 V
I also measured all supply voltages. They are in tolerance and without any unusual noise. The main +7V reference is stable too. Then, I checked reference signals in A/D converter circuit:
DC measurements with my KEI2000, same config as above:
Vref 6.4V : 6.22416 V, std. dev.: 2.28 uV
+Vref +10.25V : 10.26373 V, std. dev.: 9.59 uV
-Vref -10.25V: -10.26004 V, std. dev.: 25.92 uV (quite high noise, IMO)
When A/D converter is disabled, i.e. it is not measuring, local reference voltages are much more stable:
+Vref +10.25V : 10.26370 V, std. dev. 2.56 uV
-Vref -10.25V : -10.25980 V, std. dev. 1.00 uV
With my scope, I measured several signals in A/D converter. They seem to be ok, except one suspicious - a control signal at gate of Q807. It is a square signal with levels 0V / -15V. I zoomed at its 0V level and I can see there is a overshoot to positive values (as high as ~300 mV, see attached pictures), which could be quite enough to inject some noise current to integrator's input (because a diode in the jfet would be forward biased). My reference ground for this measurement was "signal common" (1). I wonder if this could be an error or not...?