Good for bow. My transformer is ok. Its the input switching that is wonky... Damn.
I found some hint in service manual :The following information provides some basic circuit theory that can be used as an aide to troubleshoot the power supply.
Pre-regulator circuitThe pre-regulator circuit regulates power to the transformer. When power is applied to the instrument, a power transformer secondary voltage (pins 12 and 13) is rectified (CR622),
doubled (C624, C630, CR624 and CR625) and applied to U619, which is a +5V regulator. This +5V (+5VC) is used for the pre-regulator circuit.
The pre-regulator circuit monitors the voltage level on C611 using an integrator (U627). The voltage on C611 (typically around 7.5V) is divided by three through R712 and R713 and
applied to the inverting input (pin 2) of the integrator. The +5V (+5VC) is divided by two through R706 and R708. This 2.5V reference is applied to the non-inverting input (pin 3) of
the integrator. When the voltage on the inverting input of the integrator is less than the 2.5V reference on the non-inverting input,
the integrator output ramps in the positive direction. This positive ramp turns on Q608, which pulls the CONT line low to digital common.
With CONT connected to common, current flows through the photodiode of U100 and generates a positive voltage at the gate of FET Q528.
As Q528 turns on, the 470W resistor (R100) becomes shunted and results in less effective resistance to the transformer.
The resultant increase in current (power) will increase the voltage on C611.
Conversely, when the voltage on the inverting input of the integrator is more than the 2.5V reference, the integrator output ramps in the negative direction and begins to turn Q608
off. This will decrease current through U100, decrease the positive voltage on Q528 and thus, increase the effective resistance
to the transformer. The resultant decrease in current (power) will decrease the voltage of C611.
This constant regulation of effective resistance in series with the transformer regulates the power delivered to the instrument.
Line voltage (110V/220V) selection circuitThis circuit automatically selects the proper power line voltage setting for the instrument. The line selection circuit derives its power from the AC1 and AC2 lines on the primary
side of the transformer. Rectifier CR104 applies approximately +18V to regulator U105. The output of U105 provides the +8V for the line voltage selection circuit and the
HI/LO voltage control circuit. U102 is a comparator that has a +4V reference (via voltage divider R111 and R112) applied to its non-inverting input.
The inverting input monitors the voltage on C103. When the voltage at the inverting input is greater than 4V, the output of U102 goes low and turns on FET Q106. With Q106 on,+8V will be applied to the +RELAY1 line, which energizes relay K101 to select the 110V setting. Conversely, when the voltage at the inverting input is less than 4V, the output of U102
goes high and turns off Q106. With Q106 off, the +8V is removed from K101 and thus, the line voltage setting defaults to 220V.
The AC power line is tied to C103 through CR102, R113 and R114 via control line ACL. When the AC power line voltage is less than approximately 135VAC,
sufficient charge remains on C103 to keep the inverting input of U102 above 4V to ultimately energize K101 (110V setting). When the AC
power line voltage is greater than approximately 18VAC, charge will be pulled from C103 dropping the voltage at the inverting input of the comparator to less than 4V.
This will de-energize K101 (220V setting).
HI/LO voltage control circuitThis circuit automatically selects the appropriate HI/LO setting for the available power line voltage. During power-up, the line voltage is rectified (CR101), divided (R105 and
R107, or R104 and R107) and applied to the base of Q102. If the voltage level at the base of Q102 is high (above zener VR101), the transistor will turn on and apply power to the
ISO1+ and ISO1- lines. With power applied to ISO1+ and ISO1-, U103 will turn on and allow Q105 to be forward biased.
With U103 and Q105 on, TRIG of U106 will be pulled low and allow its output (OUT) to latch at +8V which will
turn on FET Q104. With Q104 on, the -RELAY2 line will be connected to common, and thus energize K101 (HI setting).
If the power line voltage decreases to a low level, U103 will turn off, but the output of U106 will remain latched at +8V.
However, the low line will be driven low turning on U104. With U104 and Q105 on, +8V will be applied to THR of
U106 forcing its output (OUT) to reset to low. With the gate of Q104 low, the FET will turn off and open the relay coil circuit
for K101 (LO setting). The low line is controlled by comparator U628. The inverting input of the comparator is connected to the 2.5V reference.
The non-inverting input monitors (via divider R709 and R711) C611. As previously explained, the typical power line voltage level will apply around 7.5V to C611. However,
if the line voltage decreases such that the voltage on C611 becomes less than 6V, the voltage level on the non-inverting
input of the comparator will drop below 2.5V causing its output (low line) to go low.