What does the I2C specification say about timing for 400kHz? I think your I2C bus might violate I2C timing.
Data Valid time for Data (i.e. SCL falling edge to SDA transition) in FS mode shall be t_VD;DAT>0.9us. In the above example we’re talking about of order 150ns.
So indeed, this device is not I2C compliant. Well spotted! (and to be clear, since this often does not get across on the net: I do not mean this sarcastically)
Be that as it may, we’re not talking about the DUT’s misbehaviour, but about apparent idiosyncrasies of the scope being used to debug the DUT’s noncompliance:
1) The same noncompliant timing is not flagged as error one segment later, so it clearly is not an out-of-spec flag.
2) The same noncompliant timing is not flagged as error at a higher sample rate, but this limits the capture length. (Here the Siglent could actually have an advantage due to the RTB having “only” 10MPts)
3) The RTB
should have sufficient samples to properly decode at this sample rate, the edges are cleanly resolved and separated. Looking at the data, I don’t think this should be borderline for the scope.
4) The RTB shows a weird delay in the timing of the detected logic levels underlying the protocol decode wrt the analogue channels that drive the protocol decoder. This is actually of an order of magnitude that would make spotting the exact I2C noncompliance you spotted difficult, if you don’t keep the analogue channels on-screen - which kinda defeats the purpose of the brilliant “bits” display R&S came up with.
Originally I figured maybe I’m “holding it wrong”, eg that maybe I’d have to fiddle with thresholds more. No dice. (Thresholds are displayed in my screenshots).
Or that maybe there was some noise or slow edges. Nope, peak-detect signal without interpolation shows a clean edge.
So the question is: is this expected behaviour? How much sample margin does one need to rely on the decoder? Can one trust the timing of the displayed “bits”?
Do you see this in your RTBs (&RTM in the case of Nico)?
In the case of Max: would you know how this stacks up to your SDS2k+?