Agilent 53220A Frequency Counter teardown

[dc101]

Rather than clog the entire thread up with pics, I'll just post the flickr link to the teardown pics.  I tore it apart to replace the optical encoder that was pretty sloppy and barely worked.  Of course I ended up having to take the entire thing apart, even the 6 GHz microwave input I've added comments where I could, feel free to add any additional ones.  Interestingly it has a debug RS232 like the 34461A, however they have different LCD panels.  I assumed one of the main reasons they went to the LCD was to make replacement parts universal, but seems this is not the case.  The 53000A only shares it's LCD with the 35000A/B function/arbitrary wave generator.  Although pixel-wise they seem to be the same resolution.

http://www.flickr.com/photos/reffahcs/sets/72157641648560105/

Cheers,
-Tim

[robrenz]

Nice pictures

[Vgkid]

Thanks for the teardown.

[dc101]

Nice pictures

Thanks!  When the new encoder from Digi-Key arrives tomorrow, I'm going to throw it all back together and then I'll take a look at the RS-232 output.  I'm really curious to see how close it is to the RS-232 output from Dave's 34461A.

[Hydrawerk]

Oh, what happened to that rotary encoder?? The whole instrument is quite new, isn't it? There should not be any problems with encoders after two years of usage or so...

[dc101]

Oh, what happened to that rotary encoder?? The whole instrument is quite new, isn't it? There should not be any problems with encoders after two years of usage or so...

It must have been hit or something.  The encoder shaft had a substantial amount of lateral movement and the ball bearing inside the shaft didn't hit every detent.  No damage to the board though, nothing cracked etc... Maybe the detents were worn out?  I can't imagine someone using the knob on the encoder that much though.  There really isn't that much to use it for.  Not like a frequency generator where you're adjusting the freq or other parameters.

[Dr. Frank]

Hi,
would you mind to make some specific photos, or try to identify the Time Interpolator circuitry in the 53220A?

Perhaps you have schematics...

I wondered how they implemented that in this instrument to achieve 20ps or 100ps single shot T.I. resolution.

Since the venerable HP5370B (time-nuts grade!), where they used 200MHz time base plus two startable, pase-locked oscillator-interpolators,  all other agilent counters only had lesser resolution, and achieved that with those quite wobbly transistor / capacitor interpolators and a 10MHz time base only. Presumably they won't get away with it for achieving stable 20ps.

Thank you!

Frank

[HighVoltage]

My Agilent 53220A is about 8 month old and the encoder did not work anymore.
Agilent repaired the instrument under warranty.
I have several older Agilent Generators and all of them had the encoder exchanged.
It seems to be a weak spot on Agilent instruments.

[TiN]

Thank you for teardown!
Whats up with RF section, it seem to be assembled by hand, i can even see flux there

Any easy way to download all pics in hi-res, like a zip or something? Saving each pic is PITA.  [/rant].

[dc101]

Thank you for teardown!
Whats up with RF section, it seem to be assembled by hand, i can even see flux there

Any easy way to download all pics in hi-res, like a zip or something? Saving each pic is PITA.  [/rant].

Ok, so it's not just me then?  I was looking at the 6 GHz section close-up and thinking the same thing.  Hand solder for sure.  I would say they probably had too much caffeine, but I doubt I could do any better  .

Makes me want to desolder the metal can on the motherboard for a look under there.  I looked into the Flickr batch download and the short answer is no, but there's 3rd party apps that will let you.  Never used any though.  Anyways don't sweat it, I'll put them in a zip file on my dropbox account and post the link.

Cheers,
-Tim

[free_electron]

the encoders in agilent devices are a pest. crappy stuff mady by ALPS.
i have replace many of em already. there is a pin compatible version from a different brand.

Time interpolator sit in those big xilinx fpga's.

I see they still use the St Spear600 cpu. good ! They are running windows CE on that.

I was at the Agilent A+ seminar yesterday. we got to play with the new signal generators 34600 ( to be release march 4 ) . really nice machines.

[Noise Floor]

I was at the Agilent A+ seminar yesterday. we got to play with the new signal generators 34600 ( to be release march 4 ) . really nice machines.

What did you think of the seminar?  (Any highlights?) I'm considering attending one when they come through my area.

[dc101]

the encoders in agilent devices are a pest. crappy stuff mady by ALPS.
i have replace many of em already. there is a pin compatible version from a different brand.

Time interpolator sit in those big xilinx fpga's.

I see they still use the St Spear600 cpu. good ! They are running windows CE on that.

I was at the Agilent A+ seminar yesterday. we got to play with the new signal generators 34600 ( to be release march 4 ) . really nice machines.

If I'm not mistaken that's the same type used in the 34461A as well?  There's also the obligatory Win CE sticker somewhere on the back case as well.

Finally figured out what the H624 chip is in the 6 GHz RF section is. Hittite DC-6 GHz digital attenuator http://pdf.datasheetarchive.com/indexerfiles/Datasheet-075/DSAE0011710.pdf  Can't quite make out the chip that comes after it, might have to take some better pictures.

[free_electron]

I was at the Agilent A+ seminar yesterday. we got to play with the new signal generators 34600 ( to be release march 4 ) . really nice machines.

What did you think of the seminar?  (Any highlights?) I'm considering attending one when they come through my area.

Do It ! it's free , and you get to play with a bunch of machinery. it is really hands-on training. not commercial bullshit.

[dc101]

Success  .... and some RS232 sniffing as well.  The baudrate is set to 115200 which I wasn't expecting.  Haven't figured out which pin on the board is for RX but I'm going to keep poking around.  There's a part during the boot where it gives you a chance to "press [SPACE] to cancel."  Wonder if anything interesting happens.

Code: [Select]

U-Boot 1.2.0 (Jan  6 2010 - 20:07:58)Agilent P500

early RTC: 2010-1-7 3:14:12.00
dram  RTC: 2010-1-7 3:14:12.00
DRAM:  128 MB
Flash: 64 kB
NAND:  128 MiB
In:    serial
Out:   serial
Err:   serial
P0500-63001-006 ZT1019300411
Chip: BD Board Rev: 4
RTC set to u-boot timestamp
init  RTC: 2010-1-7 3:14:12.27
splash RTC: 2010-1-7 3:14:12.39
fpga RTC: 2010-1-7 3:14:12.81
Press space to stop autoboot:  1  0
## Booting image at f8050000 ...
   Image Name:   PBOOT
   Created:      2009-10-22  11:56:02 UTC
   Image Type:   ARM Linux Kernel Image (gzip compressed)
   Data Size:    37189 Bytes = 36.3 kB
   Load Address: 00000000
   Entry Point:  00000000
   Uncompressing Kernel Image ... OK

Starting kernel ...


Debug serial initialized ........OK
RTC: 2010-1-7   3:14:14.15 UTC

Microsoft Windows CE Bootloader Common Library Version 1.4 Built Oct 22 2009 03:38:06
Microsoft Windows CE 6.0 Ethernet Bootloader for the Agilent P500 board
Adaptation performed by Agilent Technologies (c) 2008


Press [ENTER] to launch image stored in flash or [SPACE] to cancel.
Initiating image launch in   1 seconds  0 seconds
System ready!
Preparing for download...
RTC: 2010-1-7   3:14:16.42 UTC
 Loading image 1 from memory at 0xD0400000
O
BL_IMAGE_TYPE_BIN

X
XXXXOOOOXOXXXOOOOOOOXOXOOOOOOOXOOOXOOOXXOOOOOOOOOXOOOOXOXOXOXOOOOXXXXOOXXOOOOOOXOOOXOOOXXOOOOXOOOOXXXOOXOOOOOXOOOXOOOXOOXXXXXOXXXXOOOXOOOOXOXOOOOXOOOOXOOXOOOOOOXOOOXOOXOOOOXXOOOOOXOXOOOOOOOOOXOXOOOOOOOXOXOOOOXOOOOXOXOOOXOXXOXOXXOXXXOXOXOXXOX
OXXXXXXOXOOOXOXOOOOXOOOOXOOOXOOXOOXOOOXOOXXXXXXXXXXXXXXXXXXXXXXXrom_offset=0x0.
XXImageStart = 0x80361000, ImageLength = 0x13021A4, LaunchAddr = 0x80362000

Completed file(s):
-------------------------------------------------------------------------------
[0]: Address=0x80361000  Length=0x13021A4  Name="" Target=RAM
 Loading image 1 succeeded.
ROMHDR at Address 80361044h
Preparing launch...
RTC: 2010-1-7   3:14:18.66 UTC
Launching windows CE image by jumping at address 0x  362000

Windows CE Kernel for ARM (Thumb Enabled) Built on Jun 16 2009 at 10:08:15
Setting up for a Cold Reboot
Done Setting up for a Cold Reboot
Windows CE Firmware Init
BSP 1.0.0 for the SPEARHEAD600AB board (built Apr  2 2013)
Adaptation performed by ADENEO (c) 2005
+OALIntrInit
-OALIntrInit(rc = 1)
Initialize driver globals Zeros area...
pDrvGlobalArea 0xa0060000  size 0x800 (0xa0060800 -0xa0060000)
Initialize driver globals Zeros area...done
 OALKitlStart
Firmware Init Done.
OALIoctlHalEnterI2cCriticalSection init i2c cs
-EDeviceLoadEeprom 00:30:D3:18:2D:C2
Phy found addr 0 (ticks=2970)
WaitForLink Start (ticks=2972)
No Link (ticks=3974)
<--EDeviceInitialize

GMAC DMA status register = 0x0
INFO: PROG_EEPROM_NOT_PERFORMED.
INFO: Security succeeded, fpgaStatus = 0x10
INFO: P500 FPGA version 035
INFO: EP2 Input FPGA version 127
INFO: EP2 Control FPGA version 154
INFO: Firmware version 04.10 Feb  7 2013 09:56:08
INFO: No Channel 3 Card present
FP:FAILED IOCTL_SER2_READ_W

[dc101]

Looking at the data sheet for that MAX232 chip.  It supports two serial ports, which is interesting when you look at the board again.  I now see that there's an un-populated 10pin header J105 right below the max chip.  Hmmm....

[dc101]

Hi,
would you mind to make some specific photos, or try to identify the Time Interpolator circuitry in the 53220A?

Perhaps you have schematics...

I wondered how they implemented that in this instrument to achieve 20ps or 100ps single shot T.I. resolution.

Since the venerable HP5370B (time-nuts grade!), where they used 200MHz time base plus two startable, pase-locked oscillator-interpolators,  all other agilent counters only had lesser resolution, and achieved that with those quite wobbly transistor / capacitor interpolators and a 10MHz time base only. Presumably they won't get away with it for achieving stable 20ps.

Thank you!

Frank

I searched everywhere for the schematics but came up empty.  The assembly-level service guide doesn't even include a block diagram.  I took a higher res photo of the microwave board which I'll post tomorrow, that's probably the best I can do.  The metal can on the main board is soldered in dozens of places, and I'm not brave enough to attempt desoldering it  .

TiN, here's the link to the zip file https://www.dropbox.com/s/fcnrbvof0760ad2/53220a.zip

-Tim

[TiN]

Thanks for package

[awallin]

Hi,
would you mind to make some specific photos, or try to identify the Time Interpolator circuitry in the 53220A?
Perhaps you have schematics...
I wondered how they implemented that in this instrument to achieve 20ps or 100ps single shot T.I. resolution.

tapped delay-line in the FPGA?

There's an open-source TDC implementation for Spartan 6 FPGAs which claims around 50 ps over here:
http://www.ohwr.org/projects/tdc-core/wiki
worth exploring, perhaps on a Papilio Pro dev-board?

Anders

[free_electron]

that bootlog is funny.

 Image Type:   ARM Linux Kernel Image (gzip compressed)

.. and it boots windows CE

 

[dc101]

Breakout of the 10-pin RS-232 header on the 53220A.  Looks like T/RX1 is stdout and T/RX2 is stderr

[SeanB]

that bootlog is funny.

 Image Type:   ARM Linux Kernel Image (gzip compressed)

.. and it boots windows CE

 

Can you imagine if they had used a FDD controller inside and required you to have a boot disk in there instead? At least the Linux kernel is able to uncompress the WinCE image and jump to it after doing all the initialization of the CPU and other firmware registers.