Okay, this gives a good first look at the layout. As I do not know if you are familiar with the fractional-n synthesizer concept, this HP Bench Brief explains the concept in a simple to understand manner:
http://www.hparchive.com/Bench_Briefs/HP-Bench-Briefs-1977-05-08.pdfAs you have learned, HP/Agilent did not make schematics available for this N/A, but the above file mentions that the HP 3325A was one of the first instruments to incorporate a fractional-n synthesizer. The schematics for the 3325 can serve as a point of reference so we are not completely in the dark:
http://www.ko4bb.com/getsimple/index.php?id=download&file=HP_Agilent/HP_3325A_Synthesizer/HP_3325A_Operating_Service_manual.pdfSome thoughts about where to begin: I would suggest checking every yellow tantalum capacitor for potentially shorted, while the board is open. A few more photos, very closeup that clearly show the IC part numbers will help to identify the functional blocks.
The performance test PT01 on page 1-24 should be performed to determine the amount of error observed in the CW accuracy.
Some method of monitoring the 30 to 60 MHz output is needed, to identify where the locked/unlocked boundary occurs. When unlocked, does the condition persist all the way to the 30 MHz end of the tuning range? Your previous data appears to indicate this to be true.
Once the boundary is located, is it possible to approach and pass the point by making very small frequency steps, or is it like hitting a wall?
Can you make a table of VCO tuning voltage from 30 to 60 MHz in 5 MHz steps? Your previous data seems to show a "binary" effect with the tuning voltage going rapidly from negative to positive near the center of the tuning range. I am interested in seeing where this transition occurs between 30 and 60 MHz. At first glance, the effect in the data looks like an open feedback loop.
This is going to be a good mix of challenge
and entertainment.
RF+ Tech
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