It seems like calibration of the interpolators helps a little, but there are still some oscillations in the timestamp. Or it could be the external clock reference PLL has some oscillations. One could dive even further into it and measure the time difference A-B between two channels (with identical signals). That removes the clock uncertainty. Further, if the input frequency is a little off from 10 MHz one can see periodic oscillations associated with interpolator non-linearity since the input edges land in different part of the interpolator DAC range.