About Factory Calibrationas you maybe know the factory calibration data is used by each Hantek/Tekway DSO to calculate
the self-calibration results agains specific hardware tolerance.
Sure, without this data the DSO will be able to run self-calibration, but you can be sure
the measured results will be wrong and over 5-10Mhz the ADC/FPGA timing constraint will not
work anymore, so you will see only crap on the display (actually they will be not run synchronous)
This factory calibration data is of course unique, each DSO have own due hardware tolerance.
There are (by default) following files on the file system:
tdc_edge125M - this is calibration for Edge Trigger by 1GSs (so each ADC in 125MHz)
tdc_overtime125M - this is calibration for Overtime Trigger by 1GSs (so each ADC in 125MHz)
tdc_pulse125M - this is calibration for Pulse Trigger by 1GSs (so each ADC in 125MHz)
mult_adc.log - this is the timing constraint table created from files above (more or less)
tdc.logthe first 4 files will get generated at factory, the 5th file (tdc.log) during self-calibration based on measured data recalculated
with data from the first 4 files.
In principle, if you do some changes to hardware, like input circuit changes, or clock oscillator changes
or even in some case you resolder something the factory calibration data need to be re-created.
And yeah, imagine if you have no warranty anymore and the NAND flash died, you will need this data
to be re-created too.
Btw, someone asked already before if there is a chance to reduce the waveform interferences,
well actually yes. By default the HanTekway DSOs are using standard quarz oscillators,
from all the models/hardware revisions over the time i know they typically specified somewhere
between 150ps up to 250ps total jitter. The FPGA pin (clock output to ADCs) jitter, as already mentioned in Rigol thread
is constant - however the calculation is based on the input clock quality (which is coming from the quarz oscillator).
This means if the clock signal have 30ps total jitter we have max 650ps jitter on ADC clock,
with 250ps input clock jitter you can calculate how the ADC clock looks like.
I did replaced my quarz oscillator, by low jitter model - FXO-HC736R-100 from Fox Electronics (digikey 631-1176-1-ND),
this baby have only ~25ps total jitter which is already below Altera specs.
However, it is not enough to change this part, the factory calibration need to be executed / re-created.
Therefore i looked around and found that Tekway/Hantek implemented the factory calibration procedure
into the firmware, as a hidden menu.
Now, with the /tst file hack (set to 300MHz bw) the waveform (100MHz test signal) looks like before with 100MHz bw,
where of course most of the HF distortion was removed. So in principe it is much better now, especially
for HF signals. This is still far from perfect but to be very honest there is no way to do it better,
except you design clock domain from scratch, as small addon boards placed directly near ADCs,
which isn't that easy.
How to run/restore Factory CalibrationYou will need 10MHz (can be something between 1 and 20MHz, i got best results with 10MHz)
SQUARE signal source. Of course a good one, with low jitter (at least as good as your quarz oscillator used in your DSO)
Don't try to do it with sinus source, it will work for overtime and evt. for edge, but not for pulse calibration.
The necessary rise time can be something between 1ns - 20ns, i got best results with 5ns rise time.
And that's the factory calibration steps :connect via UART to DSO
kill the dso application by typing
killall dso.exeIf you wish only to play around/test how this work, copy these files somewhere (stick, separate directory)
tdc.log
tdc_edge125M
tdc_edge (if exists, this files is really optional so don't care if you don't have it)
tdc_overtime125M
tdc_overtime (if exists, this files is really optional so don't care if you don't have it)
tdc_pulse125M
tdc_pulse (if exists, this files is really optional so don't care if you don't have it)
mult_adc.log
You can restore them and everything will be as before (evt. you need to run after restored these files
and RESTARTED your DSO the self calibration once)
create /tdc.new file, by typing
touch /tdc.newrun on the shell (over UART/Terminal) the dso application by typing
/dso.execonnect 10MHz low jitter square generator to channel 1
Click once "default setup", click once "Autoset",
Go to channel 1 settings, select coupling AC, go to trigger menu
and select Coupling AC, click once Trigger level knob to set trigger to ZERO line.
Select horizontal res. to 4ns/DIV.
Evt. increase the 10MHz aplitude, best distortion results are with aplitude over 8 div,
best small signal result with amplitude over 2 div - you can test what works better for your DSO/needs.
Now we ready for manufacturer calibration. Note that the DSO need some of these steps or it
will not let you re-create the manufacturer calibration files. The AC trigger and AC input
are optional, but as the calibration is checking zerocrossing it make sense to set like this.
You can of course do DC, but then your generator need to create +- waveform.
Now go to trigger menu, select type Edge, now click multiple time (fast) the "trigger Menu" button.
You should get an hidden window displayed.
Select F1 to continue, if you get
"force quit!!!" message some of the settings are wrong, start from beginning
If everything fine the DSO will display
Creating TDC(1GSps)
Push KEY_F0 to force quit!!!just wait until is it ready (a minute max.)
now select trigger type to pulse, open second page (F6)
and select "=" and pulse width of your test signal (so for 10MHz 50ns). As we in 4ns/DIV the next possible value
is 48ns, however you can change the horizontal res. to 20ns/DIV, select pulse Width to 50ns and select back the
horizontal res. to 4ns/DIV.
Now again click multiple time (fast) the key "trigger menu", again hidden menu will get displayed, select there F1.
If everything fine the DSO will display
Creating TDC(1GSps)
Push KEY_F0 to force quit!!!just wait until is it ready (a minute max.)
now select trigger type to O.T. (over time) and select lowest overtime value (should be 24ns)
Now again click multiple time (fast) the key "trigger menu", again hidden menu will get displayed, select there F1.
If everything fine the DSO will display
Creating TDC(1GSps)
Push KEY_F0 to force quit!!!just wait until is it ready (a minute max.)
That's all, the DSO have now created all necessary factory calibration files.
Now you can disconnect the 10MHz signal generator and run self-calibration.
You can reply all these steps to get best results.
Finally, if you happy, delete the tdc.new file by
rm /tdc.newor by clicking multiple time (fast) the key "trigger menu" and selecting there F3 from the hidden menu.
what else ...During the factory calibration the firmware is automaitcally re-loading the created files, so you don't haev to restart the DSO
to run self-calibration.
However, if you break up the factory calibration or wish only to test it, you will need to reboot DSO to reload
your original data (which of course need to be restored first as mentioned above).
The good thing is, you can't damage HanTekway DSO, the linux OS makes backup/restore easy,
now as we know how factory calibration works we can play with whatever we wish (except CPLD programming
which can't be restored - but Hantek have no issues at all to sell/send you replacement CPLD).
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