Hantek - Tekway - DSO hack - get 200MHz bw for free

[e-pirate]

^^ maybe that's why this one was suposed to be for chinese market.

Nop. Pioneer told me it's original English, besides there were some 5062 from Pioneer with English face for another guy from Russia (not Igor).
I will post some pictures as soon as I get home and have enough time to make photos and upload them to my server.
For the missing radiator.. that sucks, I know, probably I will cut some old PC motherboard chipset radiator with Dremel, not to live it hot, seems that cause edge dramatically change during cold power on and hit up. Seems that it affect only one channel. I will make some test with prob attenuation and replay asap.

[nukie]

Isopropyl for rosin flux.

For cleaning the "stubborn' flux, if small area, I usually use Zippo or Ventti lighter fluid. It's superb for cleaning any sticky stuff. Finish off with Isopropyl alcohol because they can leave very little white residue when dry. It's quite expensive in Australia(compared to petrol) but a bottle of 133mL goes a long way for me. This stuff is extremely flammable, well it's called lighter fluid it's used to make flame, so you better be careful when working with it. Keep it away from your solder tool and the likes.

I've been doing this for more than 15 years, no corrosion what so ever on any of my earlier FR4 boards.

Yes I smoke, I smoke rosin not nicotine.  

[e-pirate]

BTW, I know there is a shift between waveforms on first and second channel when connected to same source on old hardware version. But I was unable to reproduce that, what I'm doing wrong and how can I see that to handle such a thing in feature?

[tinhead]

BTW, I know there is a shift between waveforms on first and second channel when connected to same source on old hardware version. But I was unable to reproduce that, what I'm doing wrong and how can I see that to handle such a thing in feature?

depends, it can be that your unit have different firmware, or due some flying components is doing the job better (haha, not a good joke),
or just cable length caused.

[e-pirate]

BTW, I know there is a shift between waveforms on first and second channel when connected to same source on old hardware version. But I was unable to reproduce that, what I'm doing wrong and how can I see that to handle such a thing in feature?

depends, it can be that your unit have different firmware, or due some flying components is doing the job better (haha, not a good joke),
or just cable length caused.

Mine is 2.06.3 (110118.0) which isn't latest. I'm asking because if I'm using both channels, basically I'm doing that to monitor two signal synchronously to see what's going on when one changes with the other one. So, if there is a shift, that might be a little bit tricky. So, if this is a hardware bug, it's not a 2 channel oscilloscope, it's a couple of scopes in one case. Having two channels became useless if they are not showing _exactly_same_time_ signal. You will not be able to see a hysteresis, for example.  IMHO.

[tinhead]

Mine is 2.06.3 (110118.0) which isn't latest. I'm asking because if I'm using both channels, basically I'm doing that to monitor two signal synchronously to see what's going on when one changes with the other one. So, if there is a shift, that might be a little bit tricky. So, if this is a hardware bug, it's not a 2 channel oscilloscope, it's a couple of scopes in one case. Having two channels became useless if they are not showing _exactly_same_time_ signal. You will not be able to see a hysteresis, for example.  IMHO.

we talk about max 1ns difference (and on new hw revision 500ps), it is not that much, but for sure not really nice.

[wjb444]

Source 60M 4ns

Not the same as the sampling depth, the waveform will be inconsistent it?

[e-pirate]

Source 60M 4ns
Not the same as the sampling depth, the waveform will be inconsistent it?

What's your fw version?

[rf-loop]

1. is 500MSa/s
2. and 3. is 400MSa/s

I have also check this with several DSO5102B's and one my opinion is: It change "fake"Sin(x)/x filtering parameters as it change samplerate. It is some kind of compromse and what you look in screen is never what is signal. For making inspections with oscilloscope is good to understand how it works and then thinking what all is between signal under test and what is signal on the screen.

Becouse there is also ADC jitter it need littlebit "overtight" filtering and result look more complex.

Draw some real signal (not theoretical) to paper and then do imagined sampling with paper and pen so that you also add some random errors -- littlebit sampling timing jitter, ADC's unbalance, amplitude analog channel noise etc. Then look best and worst case where are sampled points (And after time jitter also readjust these exatly every 1ns becouse scope "think" they are taken these times and not real times including jitter (so that timing jitter X change to amplitude Y = time jitter means variable signal amplitude modulation. (you can use ADC as modulator in some application)), and fit some curve these points... oh yes... on your paper and pen picture you see nearly exactly same ... look paper... look scope screen.. why it looks just same?

Btw, for time difference measurements with continuous signals.. use high level averaging.

There is littlebit time difference between channels if you put exactly same signal to both BNC connector so that in this point time difference is around zero. Scopes looks like CH2 is around <1ns late. (part of this is coming from time splitted ADC's ans also that maximum sampling speed is 125MSa/s in one ADC. My opinion is that it need correct in FW. 1 channel and 2 channel sampled points need small timeshift or ADC's clock signals timing need change different on 1 and 2 channel use. I hope they make correction later. (but we need remember, this is cheapest possible oscilloscope in its class and in this group it is very good)

What to do for timing... becouse there is no "skew" adjustment -- you can very easy adjust it outside. (specially becouse time difference is nearly constant if scope have warmed and stabilized.)

Measure this time difference and  make short delay line. (if coaxial have speed factor 0.8 then 1ns is 24cm)   (You need BNC M, BNG F, right lenght of 50 ohm coaxial cable) you can very easy adjust time difference under scope resolution. If CH2 is 1ns late simple put 1ns delay line to CH1. In professional good lab scopes have this adjustment. Example in Tektronix 2465 series there is adjustment (CH2 delay (if it is enabled in system cal settings for user)) Many digital scopes do this delay zeroing in the selfcal routines. It looks like this scope do not it (or it have done wrong - as many things in scope - but agen - it is extremely cheap. 10000 scope and 500 scopes are different)

[e-pirate]

HanTekWay may fix that in the feature since this bug is known and if timeshift stays constant or vary little, it's not gonna be very difficult to make a software fix. IMHO.

[rf-loop]

Yes.

Also they need check and fix ADC timing sequence related to 1 channel or 2 channel use and related to short and long capture memory use.

I think there is something wrong in sampling clock phasing sequence with alternate 8 phase sampling (1 channel) and parallel alternate 4 phase sampling (2 channel use). Maybe some logical misthinking or simple mistake in some FW update??

But it is difficult to analyze becouse scope have not mode where it show _real_ sampled points on the screen if use fastest horizontal speed.

In one channel use there need be 8 separate ADC so clocked that analog samples are taken 1ns steps. (there is some phasing error becouse signal attenuation do not follow logically as samplerate change.

Also there is one tinhead comment that some FW update maybe have affect somehow this 2 channel skew. maybe this is also related to this possible samplers "phasing" error.  (if example I look CH1 signal with 500MSa/s (2 channel also selected). Then I turn it 1GSa/s. It looks like nothing happend....yes more noise...  what happend if they do not sample sequentially right 8 phase.. with right timing... what if signal is parallel to all adc in 1ch mode but it do 4 + 4 phase sampling... and if 2 channel mode they do sequentially 8 phase sampling but alternately for ADC groups (juts opposite as need do). It explain very easy this 1ns skew AND also situation what looks like no any advantage if change 2 channel use to 1 channel use if look 1 channel high frequency sine.

[e-pirate]

I thought why not to replace electrolytic capacitors as they seem to me to be low quality.
To start with PSU: there are:
1. 100 uF x 400 V (150C)
2. 47 uF x 35 V
3. 22 uF x 16 V
4. 1000 uF x 16 V (4 pc)
5. 47 uF x 25 V
6. 1000 uF x 25 V
7. 100 uF x 35 V
I would like to know is there is a way to improve PSU by increasing capacitance or voltages of this caps? Should I use low impedance/ESR caps?
Besides, there are 6 1000 uF x 10 V and 8 220 uF x 16 V and one 470 uF x 25 on mainboard, any suggestions what to with them?

[tinhead]

I thought why not to replace electrolytic capacitors as they seem to me to be low quality.
To start with PSU: there are:
1. 100 uF x 400 V (150C)
2. 47 uF x 35 V
3. 22 uF x 16 V
4. 1000 uF x 16 V (4 pc)
5. 47 uF x 25 V
6. 1000 uF x 25 V
7. 100 uF x 35 V
I would like to know is there is a way to improve PSU by increasing capacitance or voltages of this caps? Should I use low impedance/ESR caps?
Besides, there are 6 1000 uF x 10 V and 8 220 uF x 16 V and one 470 uF x 25 on mainboard, any suggestions what to with them?

to replace caps without exact knowldge of PSU details it will not improve anything.

Let me tell you about the power supply on these DSOs (this is for the old hardware revisions only)

The PSU is delivering some voltages, especially +5 and +3.3V are important.

Channels and Trigger Input circuit is using own LDO, the ripple is low enough to say that these are good designed.
Still, these LDOs can be replaced by better once, mit higher PSSR and lower noise. These LDOs are located on
the left side of the main PCB.

FPGA is using two additonal LDOs, they good enough (ok, AMS1117 is not the best one, but should have no influence on DSO quality)
SoC is using two additional LDOs too, same as fr FPGA - they can be replaced by better LDOs but not really important.

ADCs and part of trigger circuit is using 3.3V coming directly from the PSU, the ripple is =<  20mV. This is not the best design at all,
especially for ADC/DAC there should be something better in place.

The 3.3V on the PSU will be created from the 5V, decreased a bit by Schottky diode and followed by Fairchild KA378R33.
The Schottky diode is reducing the LDO input voltage to reduce LDOs Power Dissapation, which make sense because the heatsink
is two numbers to small anyway. The Fiarchild KA378R33 is not designed the best choice, the PSSR is low, noice level high and it is
to slow responding. A ugly chinese/cost-reduction design.

A good replacement (note, the 3.3V will be used for other voltages creation too, like FPGA, SoC, and used by all logic ICs - this is
giving some load and need fast response LDOs) could be something like LT1585, of course the ugly Schottky diode need to be removed too
as the LT1585 have a bit higher droupout voltage.

For ADCs and part of the DAC/trigger circuit where this voltage will be used a separate solution is the only way,
there are no LDOs with such low dropout volage (well, there are some , but initial min. voltage is higher than these 3.3V)

As the 3.3V will be anyway generated from the 5V, we can take the 5V and generate proper 3.0V for ADCs,DAC and trigger IC separatelly.
Luckily each part of affected circuit can be easily disonnected from the 3.3V - by removing of the ind. filters on the main pcb.
Top side ADCs are then separated from bottom side ADCs and from DAC/Trigger. Each these groups is using not more
than 90mA (two or single chan, 1GSs, highest resolution, highest memory tested, with high loaded input and ext. trigger)
so with 3 low noise/high PSSR LDOs a really clean and stable voltage can be generated - for example with LP5900SD-3.0

If you look on the Instek DSOs (which is the original design for input/ADCs circuit used later by Hantek/Tekway/Rigol), you will see that
the power supply is generated in proper way, every ADC have all recommended decoupling caps, ADCs having own LDOs and so on.
Then Rigol - they removed some decoupling caps and started with the crap voltage thing (one 3.3V, a cheap low ESR caps),
and then Hantek/Tekway - they removed again some (well, only one per ADC) decoupling caps ... is it really bad ? Well sure,
far away from what AD is recomending for the AD9288, is it working ? Sure, but not the best design.
Why this happens ? Well, as EE you can design nice things, but then you have still to sell them, so it was probably cost reducion thing
afterall. For an EE no a big deal to create proper voltages (or solder 8 decoupling caps like i did), but i don't like it.

To be very honest i recognized this "issues" first as i was testing better (from overclocking and SNR point of view) ADCs (AD9218), they need better power supply and as i started
to trace i found out "ups, someone was too smart and removed too much parts".
Probably Hantek will answer "no our EE tested everything and 20mV ripple is not too much for ADCs"

Anyway, even with additional decoupling caps or better 3.3V voltage, i don't think it will have a real big influence
on the skew time issue, or warm-up drift or noise level by 1GSs (but maybe i'm wrong).

I have here tons of high quality LDOs/parts, in a free "minute" i will test it a bit and report back. So for now, don't replace caps as they
not a real issue.

[e-pirate]

Huh, this device looks like a DIY kit But we can squeeze more out of it, I think. Unfortunately, I'm not a PSU designer at all. and when it comes to switching PSUs - hands up.
BTW, I have no clue what the f... fluxe the use, but acetone did nothing, same sticky surface. And it very-very hard to wash it because outputs are long.

[tinhead]

Huh, this device looks like a DIY kit But we can squeeze more out of it, I think. Unfortunately, I'm not a PSU designer at all. and when it comes to switching PSUs - hands up.

hehe, not really DIY.

This is the common problem, you as EE design something, it works good, they you boss will tell you "reduce the price".
So where you will start ? Well, some caps here and there, smaller heatsink and schotky-diode instead, cheaper LDO (AMS instead of better brand - makes 1USD per LDO, or this Fairchild LDO instead of a good one makes 6 USD).
This is not actually Hantek designers fault, that's actually created by us - we expecting to get nice DSO for small price. Brand manufacturers like Tektronix/Agilent probably don't care, everything what necessary will
be implemented, the customer have to pay anyway x-time the parts value. Chinese manufacturers can't just do the same, they have to reduce the revenue and price, because if not you will not buy it ...

Is this PSU "issue" tragic ? No, actually not. The overall DSO design is good, the PSU "issue" can be easily fixed for 10USD total, so not a big deal. Do i like it ? No, not really, but i haven't expected such good quality
as i bought all these chinese DSOs - and to be very honest at that time (and still today) Tekway (and now Hantek too) was the best choice.

The ancient Rigol screen is just ugly, low framerate, low cost DSP, same PSU "issues" as Hantek. The UNI-Ts are even worse, cheap high noise ADCs, cheap display (even these new with pseudo bright screen),
tons of issues in firmware never fixed, support - no not at all. Siglent/Atten - well, they only fixed on "sell", they don't care about customer feedback. From design perspective somewhere between UNI-T and Rigol.

[e-pirate]

I was able to hook up there with my USB<->USART FT232R based board and take a look at what inside. For thous folks who are using *nix on "big" puter, your command will be (make sure to replace /dev/ttyUSB0 with what you have):

Code: [Select]

cu -l /dev/ttyUSB0 -s 115200and to get "almost all" backup type

Code: [Select]

tar -cvpf /mnt/root_backup_originall.tar / --exclude "mnt/*" --exclude "proc/*"
and don't forget to umount /mnt before you rip out thumbdrive.

2 tinhead: do you have any sujestions about "10USD total" PSU fixup?

[Igor]

I think more relevant change power supply to work not only on AC 110-240V, but from DC 12V.
I want to do so as soon as possible.

[e-pirate]

Here are some photos of my DSO:

[tinhead]

2 tinhead: do you have any sujestions about "10USD total" PSU fixup?

oh well, there are many possible parts. As the 3.3V will be generated from 5V you don't have even to disassemble the PSU for testing,
just connect an LDO to front USB and measure the ripple. On the PSU-side ht 5V ripple is bit higher as on VUSB-side, but if you
have good results you can then try to replace on PSU and measure there.

Semi-direct replacements for the KA378R33:
LT1585CM-3.3 or LT1585CM-ADJ - 3A LDO, ADJ for better PSSR
or
TPS75833 or TPS75801 - 3A LDO
or even PTH04070WAH (or PTH04070WAZT) - which is 3A DC/DC with 10mV/Vpp ripple.

Both LDOs will reduce the ripple on 3.3V only a littebit in compare to KA378R33, but more important is they are designed for
fast transient response. The DC/DC converter need of course some output filter, see Altera/TI PTH04070W appnotes.



For separate ADC power supply something like a combination of some parts:
TPS73701 from 5V to 4.3V-4.5V 1A
TPS7A8001 from 4.3 to 3.0V-3.3V, 1A

The LP5900SD-3.0 (or 3.3) would be even better for 4.3->3.0 conversion, the only problem is you will
need 3 of them. Advantage - less ripple/noise than TPS7A8001, disadvantage - ADCs not powered with same VCC.

All these parts are luckily small, they can be easily placed on small separate PCB fixed to main pcb, see attached picture.
As said before, that's only proposal, i (or someone else) have to check it in detail.

[tinhead]

attached the ripple pictures (believe me, you don't want to see the noise ...) , note the VUSB ripple look
different as the 5V on PSU directly. The 3.3V ripple on the picture is avg. value digitally and analog filtered to see the form,
so the measured amplitude is lower than the real amplitude (with good Analog scope measured 18mV Vpp on ADC directly).

On the new hardware revision the 3.3V ripple seems to be lower, however i don't see any PSU/VCC changes so probably
caused by parts quality. Therefore my measurments are only valid for my actuall unit, it might be that you will see
something different.

[e-pirate]

Very interesting!
So, what part quality may be different? Solid devices should be same, any idea?
I'm I right thinking that 3.3V PSU ripple is what we see on idle/connected to ground probe?

[tinhead]

So, what part quality may be different? Solid devices should be same, any idea?

For example the smps transformer could be developed different, this is custom part so we can't see
if there was a design change. Another possiblity are caps on PSU PCB with maybe different ESR matching better the
PSU design. If you measure around on the PSU you will see that only the 5V is having such massive ripple,
the other voltages are better - even unloaded, so sure there is room for improvement.
I don't have new hardware revision here, but someone else did measured the ripple and i do trust him.

I'm I right thinking that 3.3V PSU ripple is what we see on idle/connected to ground probe?

no, this not work like that.

The PSU ripple/noise have influence on ADC quantization reducing the ENOB.
As the ADCs are overclocked we can't calculate the error, so all we can do is to improve PSRR/noise.

Traditionaly after switching regulator (PSU) a LDO with some ferrite beads will follow to filter the VCC.
Of course EE can save some money and supply the VCC directly from switching regulator (that's what Hantek is doing),
but then a combination of rc snubber/ferrite bead/filter is necessary to decrease ripple/noise (which Hantek didn't did except single ferrite bead).

[e-pirate]

BTW, what is a *.bin fs type yaffs or yaffs2? I'm looking for a way to mount root.bin, made by backup utility.

sed and awk are available, as I can see in my tar backup, I have no clue why they need them on DSO, but this gives us ability to "softly" hack a device by batch editing configs and moving/renaming other files. That will help folks, having no UART. And this gonna be more safe than loading bin file. We can backup files prior making modifications.

[rf-loop]

As we all know just all discuss in this forum are highly folloved by Tekway/Hantek.
Rigol we teach make mod more difficult.

Hantek need do only some simple changes and all is end.
(yes still it is modable but not so easy as before)

And more they need do work with this mod related things... more there is delay for these develop what they really need do.
If we push them to work with this mod issue it takes resources from some more important things.

Now it is not yet so clever to stop mod (by Hantek) becouse this propability may rise selling...
And maybe there need be some small window still open but...

tinhead have done lot of fine work for this and we can respect highly his superior work if first read carefully all what he have write. Tehere is lot of info and wink how to do.

Discl. This is only my personal opinion and I have not any relationship with Tekway or Hantek.
I do not comment possible comments what this may induce.

[e-pirate]

I wonder if we are actually breaking any laws by modifying firmware and hardware and making that stuff public.. And especially opening the process itself.