So, I've decided to see if the Voltcraft is gonna be a a source for parts/modules or it can be restored, I've seen the pretty strange JTAG restoration procedure with some windozo-chinesian parallel port adapter and strange program and I was wondering if I can't use Linux, OpenOCD and my cheap J-Link V8 clone.
It seems that it is possible, and I'll post here some notes for the Linux users, maybe someone we'll find them useful to restore/hack his device. this micro-tutorial assumes that the user is a bit familiar with compiling programs from source under Linux and running a couple of simple command line commands.
If anyone needs details I'll be happy to oblige, but I don't want to make this too complicated:
- From the hardwaffe point of view, the biggest hurdle is to extract the mainboard without damaging the ribbon cables for the screen and front panel and solder some wires on the JTAG connector, or, if you have OCD, find a 2mm pitch 2x10pin dual row connector, then build a cable with an adapter for the 20pin 2.54mm of the JTAG adapter, I don't have OCD, so I just cut some cheap Dupont male cables in half and soldered the wires directly, in the picture one can see how they were stick in the 20pin connector of the cable that comes with the J-Link clone, just in case it may be useful for somebody with the same adapter here are the colors and the signals:
GND- Black
nTRST - Brown
VTRef - Republicans
TDI - Trump
TMS - Yellow
TCK - Greta
TDO - Democrats
nRST - Purple rain
- First softwaffe things first, get the latest OpenOCD sources (clone the master repository), compile and install it, a simplified list of commands will be:
git clone https://git.code.sf.net/p/openocd/code openocd-code
cd openocd-code
sudo apt install libftdi-dev libftdi1-dev libhidapi-dev
#(these were the development libraries that I was missing, if you have others not installed, configure will stop and indicate what is missing)
./boostrap
./configure --enable-jlink --enable-usb-blaster --enable-stlink --enable-doxygen-pdf --enable-usbprog --enable-openjtag --enable-cmsis-dap --enable-cmsis-dap-v2 --enable-usb-blaster-2 --enable-ulink --enable-ftdi
# (these are all the JTAG adapters that I already have or plan to get in the future).
# At the end of the configure script, if you used the same parameters, you should get:
OpenOCD configuration summary
--------------------------------------------------
MPSSE mode of FTDI based devices yes
ST-Link Programmer yes
TI ICDI JTAG Programmer yes (auto)
Keil ULINK JTAG Programmer yes
Altera USB-Blaster II Compatible yes
Bitbang mode of FT232R based devices yes (auto)
Versaloon-Link JTAG Programmer yes (auto)
TI XDS110 Debug Probe yes (auto)
CMSIS-DAP v2 Compliant Debugger yes
OSBDM (JTAG only) Programmer yes (auto)
eStick/opendous JTAG Programmer yes (auto)
Olimex ARM-JTAG-EW Programmer yes (auto)
Raisonance RLink JTAG Programmer yes (auto)
USBProg JTAG Programmer yes
Andes JTAG Programmer yes (auto)
CMSIS-DAP Compliant Debugger yes
Nu-Link Programmer yes (auto)
Cypress KitProg Programmer yes (auto)
Altera USB-Blaster Compatible yes
ASIX Presto Adapter yes (auto)
OpenJTAG Adapter yes
Linux GPIO bitbang through libgpiod no
SEGGER J-Link Programmer yes
Bus Pirate yes (auto)
Use Capstone disassembly framework no
#(The last command will install the new openocd in the /usr/local/bin)
make && sudo make install
Once the fresh openocd is installed, one needs a configuration file for the board, fortunately there is already one available, that is attached to this message, it has the right SoC and the right flash so you don't have to do anything
.
The next configuration file that is needed it the one for the JTAG adapter, I'm using a cheap (12EUR) J-Link clone (observe picture). IMMV, then you have to use the suitable configuration file for your adapter.
Finally launch the OpenOCD server:
openocd -f interface/jlink.cfg -f target/voltcraft_dso-3062c.cfg
Open On-Chip Debugger 0.11.0+dev-00463-ga498a3dea (2021-11-14-12:31)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : auto-selecting first available session transport "jtag". To override use 'transport select <transport>'.
Info : J-Link V9 compiled May 7 2021 16:26:12
Info : Hardware version: 9.70
Info : VTarget = 3.279 V
Info : Reduced speed from 16000 kHz to 15000 kHz (maximum)
Info : Reduced speed from 16000 kHz to 15000 kHz (maximum)
Info : clock speed 16000 kHz
Info : JTAG tap: s3c2440.cpu tap/device found: 0x0032409d (mfg: 0x04e (Samsung), part: 0x0324, ver: 0x0)
Info : Embedded ICE version 2
Info : s3c2440.cpu: hardware has 2 breakpoint/watchpoint units
Info : starting gdb server for s3c2440.cpu on 3333
Info : Listening on port 3333 for gdb connections
[b]Info : JTAG tap: s3c2440.cpu tap/device found: 0x0032409d (mfg: 0x04e (Samsung), part: 0x0324, ver: 0x0)[/b]
Warn : NOTE! DCC downloads have not been enabled, defaulting to slow memory writes. Type 'help dcc'.
Warn : NOTE! Severe performance degradation without fast memory access enabled. Type 'help fast'.
target halted in ARM state due to debug-request, current mode: Undefined instruction
cpsr: 0x800000db pc: 0x33d801c4
MMU: disabled, D-Cache: disabled, I-Cache: enabled
[b]#0: NAND 64MiB 3.3V 8-bit (Samsung) pagesize: 512, buswidth: 8,
blocksize: 16384, blocks: 4096
[/b]
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : accepting 'telnet' connection on tcp/4444
(it will stay here waiting to be killed, but I keep it in the foreground to see what is printed and do the telnet in another terminal window)
As you can see the SoC and the flash are recognized immediately, so install your telnet program and connect by doing:
telnet localhost 4444You should get back something like:
telnet localhost 4444
Trying 127.0.0.1...
Connected to localhost.
Escape character is '^]'.
Open On-Chip Debugger
One can try some commands to probe the NAND again::
> nand probe 0
NAND flash device 'NAND 64MiB 3.3V 8-bit (Samsung)' found
In an attempt to change the the programming speed from glacial to extremely slow
I've used their advice and enable the fast memory access:
s3c2440.cpu arm7_9 fast_memory_access enable
I don't think that it increased the speed too much, but just for completion.
###### !!!!!!!!! WARNING, FROM HERE ON IS THE POINT OF NO RETURN, YOUR SCOPE WILL BE BRICKED AND MAY OR NOT COME BACK !!!!!!!!!! #############
###### !!!!!!!!! DO YOU HAVE YOUR FULL FIRMWARE BACKUP WITH OOB, IF NOT STOP NOW !!!!!!!!!! #############
So let's irreversible ERASE THE NAND:
> nand erase 0
s3c2440_read_block_data: reading data: 0x5569077b5730, 0x7fff3c3a61e2, 6
s3c2440_read_block_data: reading data: 0x5569077b5730, 0x7fff3c3a61e2, 6
... a MILLION of these lines will scroll, and scroll, and scroll, for ca. 5 min :palm:
... and then, suddeny:
erased blocks 0 to 4095 on NAND flash device #0 'NAND 64MiB 3.3V 8-bit'
Then is time to program your full firmware backup with OOB data:
> nand write 0 fw_backup.bin 0 oob_raw
And here we stop for the moment, because after two hours, the operation didn't completed yet
, when/if will complete I'll update the post, but I have high hopes that will be done, as opposed with the erase operation the write is completely mute
and doesn't produce any message on the console, but the good thing is that there are also no error messages
.
EDIT: IT WORKS !!!
At the GLORIOUS speed of 1.509 KiB/s
!!!
But at least it runs now happily (it does fail the self-calibration with the files included in the donated firmware, but this thread provides EVERYTHING !!!, including how to redo the factory calibration
)
So yeah, I've now seen what produced the original issue, the previous owner seem to have installed the update available on the Voltcraft site, that bricks the <15000 series device and this is a 11xxx, and the update even has a BIG WARNING file, but I guess is hopeless for some, egal what warning one includes.
In any case, the logo made with the logo editor from this thread can be both put in the Linux partition and the resulted .ebm file can be put in the logo flash partition as well, because this was screwed-up as well.
The only sad part is the sad condition of the well known programmers with OpenOCD, it's ridiculous to have complex programmable state machines and just use them for bit banging, via a gorrilion layers of abstraction, no wonder that the parallel port adapter works much better
, but I guess it is how it is.
Now I can finally assist newbies like I was with everything
.
Cheers,
DC1MC
Cheers,
DC1MC