In order not to look for answers, you can install those chips yourself that you consider necessary
Not sure whether it was meant that way, but your comment comes across as disparaging. Which would be unwarranted, since my question was sincere:
If indeed you populated 2 GB DRAM chips instead of 4 GB, that would obviously be an explanation why they did not work. Since you seem to know what you are doing, I assume you had a good reason to choose those chips. Hence I would hope that you can share that reason. Thanks!
@2084's experiment was worthwhile.
I think 2GB vs 4GB might not
absolutely cause it to
not workPoint: the controller may not see anything above the 2GB boundary, but the values in the first 2 gigs should've been ok, therefore it probably wouldn't outright fail..
Anyone who has debugged enough Dram designs with a solder short/open on an address line knows what I mean.
Well, the naked lands could have been probed before trying to solder in the chip, yes?
If you have a DHO800 with no chips blocking the pads you can probe them to look for activity at boot up.
PS: Has anybody looked in the boot log for messages to do with extra memory?
Point 1: Most of the signals(address/data) are routed to each of the Drams, only control lines differ, so you have to find the individual Chip Selects, to see if they're being addressed.
Point 2: I thought it was already discussed/agreed that the FPGA DDR3's aren't connected to the system., so how would Android know to look for/log it?
I have not found exactly the same memory chips on sale. But somewhere on the network I saw a debug board with FPGA ZYNQ, on which exactly the same memory chips were installed that I installed in my Rigol. From this I concluded that they must be compatible..... That's all..... Was there such a great need for this explanation of mine???
I say again: I think you did a good job the reflowing the DDR's on your unit. No shorts, and it boots and still works? Fantastic.
The chips you found don't appear to be DDR3L, which may be a problem, since they may not
always work well at that lower voltage. (1.35 vs 1.5 volts)
Do you really think that I don’t understand this? Of course, this probability is quite high... But how can you estimate the probability that the guys from Rigol prescribed a strictly defined model of RAM chips in the FPGA?
I think this probability is close to 100%. It makes no sense for them to prescribe settings for dozens of memory chip models.
Actually, it is bad design to
NOT plan for several "memory chip models". Horrible., considering how volatile the Ram market is/has been historically. Single sourced parts are avoided at all costs, if the company wants to stay in business for very long.
I think it is entirely possible that the RAM is unused (at this time). I have speculated earlier that Rigol had originally designed it in to store the digital data, providing extra capacity and extra bandwidth for these. But ran into problems, maybe routing congestions in the FPGA, and decided to share the main RAM between analog and digital data, as a fallback solution. Which would explain the somewhat embarrassing reduction of the analog sampling rate when the digital channels are used.
Edit: Maybe Rigol are still hoping to eventually enable the extra RAM, by fixing/improving the FPGA configuration for the DHO900. They have not updated the datasheet to make the reduced analog sampling rate in LA mode official and final.
@ebastler I think you nailed it. This is the most probable scenario. The extra DDR3's aren't in use in the 900's, but probably/hopefully will be used via an update, some time in the future.