Fast rise time 2nS or 1nS signal generator

[diydidi]

Hi
Anybody know of a not too expensive fast rise time square generator capable of giving rise time of 1 or 2nS?
I need it to calibrate some of my analog scopes.

[nixfu]

Maybe ring type oscillator could get something that small.  That basically gets you down to the time it takes to travel down the logic gate ring and back to the beginning.  They are simple to make using any odd number of gates.

http://en.wikipedia.org/wiki/Ring_oscillator



Or if you want something REALLY fast you can check out the video Dave made about a pulse generator that can provide pulses measured in picoseconds that you can build yourself.

[donmr]

Look up Step Recovery Diode (SRD).  If you are up to a little assembly you can build a circuit to run from any ordinary pulse source (even  555 timer chip) and speed up its edges.

http://literature.cdn.keysight.com/litweb/pdf/5954-2056.pdf

[c4757p]

Or if you want something REALLY fast you can check out the video Dave made about a pulse generator that can provide pulses measured in picoseconds that you can build yourself.

These aren't all that useful - they're too fast for their own good; the pulses that come out aren't just fast, they're messy. If you're trying to calibrate something, you want a fast rise, but you also want a smooth rise that settles to a flat top with minimal ringing.

In fact, a lot of these analog scope calibration routines specify a rather higher rise time than you really need, and what's truly important is the shape of the pulse.

[biot]

w2aew made a really nice video about a Schmitt trigger oscillator which is essentially a square wave output with about 2ns rise time:

[marshallh]

These days you could just use a 74 series chip, pick any one with an output. Its output will be plenty fast, maybe too fast

[tggzzz]

Anybody know of a not too expensive fast rise time square generator capable of giving rise time of 1 or 2nS?
I need it to calibrate some of my analog scopes.

ECL logic gates and fast comparators can both have much faster risetimes than you specify, and (provided the normal RF precautions are taken) the transition can be well-defined. So, have an odd number of ECL logic inverters or fast comparators with each output feeding another's input - i.e. a ring oscillator.

To reduce the frequency without changing the risetime, make one of the lines an impedance-controlled line which is about 6" long per ns increase in period (note not nS, that's conductance!))

The same effect can, of course, be achieved by having an RC filter in between two stages. But beware of slower transitions in the circuits "near" the RC filter - use extra gates to sharpen up the edges.

[c4757p]

Instead of ring oscillators, which are going to give a rather high frequency and rise time, why not just use a couple inverters to reshape arbitrary square waves? Feed in any frequency you want from a signal generator, get the same frequency with fast rise out the other end.

[tggzzz]

Instead of ring oscillators, which are going to give a rather high frequency and rise time, why not just use a couple inverters to reshape arbitrary square waves? Feed in any frequency you want from a signal generator, get the same frequency with fast rise out the other end.

That would work, of course, with either logic gates or comparators. Look for ECL outputs (of whatever variety) for short risetimes.

[T3sl4co1l]

High speed logic families 74LVC and up are about fast enough.  The pin drivers in this family are a little bit under 50 ohms, so you should be able to drive a pulse right into 50 ohm coax without too much reflection; you may need an additional series resistor to get source termination just right.

A schmitt trigger (74LVC14, etc.) or chaining a few gates (you'll have plenty to spare in a SO14/16 size -- though they're also available in 1G, 2G, etc. mini packages) will get you about as fast a rise time as you can get, from whatever your source happens to be.  You can also use the extra gates as an oscillator or pulse generator, depending on if you want external sync or what.

Tim

[edavid]

The LTC6905 is a nice 1 chip solution: http://www.pa4tim.nl/?p=2677

[tggzzz]

A schmitt trigger (74LVC14, etc.) or chaining a few gates (you'll have plenty to spare in a SO14/16 size -- though they're also available in 1G, 2G, etc. mini packages) will get you about as fast a rise time as you can get, from whatever your source happens to be. 

How so? The data sheet says "<2ns".

Other logic families have transition times much less than 1ns. The first example that comes to hand has a risetime of 35ps and minimum pulse width of 100ps. See http://www.analog.com/en/special-linear-functions/comparators/adcmp582/products/product.html

[T3sl4co1l]

Oops, more specifically that should say "as fast as you can get [from the gate]".  Since output risetime generally depends on input risetime -- not so much with buffered families, but the general idea is, you chain enough together and the rise time saturates to whatever you get when the input and output risetimes are equal.  Sure it might be a little faster if you drove it with something screaming fast, but where are you going to get that, right?

Even among CMOS, there are certainly faster families, and other devices (like comparators) that are even better examples than LVC, yes.

I would shy away from ECL, because the voltages weird (DC bias) and small swing.  Of course, that's fine if you don't need much voltage, and as long as all you're looking at is the step or a short pulse, you can remove the bias with a coupling capacitor.

Tim

[tggzzz]

Oops, more specifically that should say "as fast as you can get [from the gate]". 

Thought you might have meant something like that!

I would shy away from ECL, because the voltages weird (DC bias) and small swing.  Of course, that's fine if you don't need much voltage, and as long as all you're looking at is the step or a short pulse, you can remove the bias with a coupling capacitor.

The device I mentioned is a comparator, so it could be driven by virtually any generator with any reasonable voltages. That page references both ECL and PECL output variants, so the power supply could be convenient. DC bias on the output is unlikely to be relevant for the OP's purpose, and could be removed by the scope's AC coupling.

But for an analogue scope, it is unlikely they need 35ps risetime

[Lukas]

74LVC1G series gates are able to generate rather clean looking pulses, I did some experiments a while back: http://www.mikrocontroller.net/topic/217945#2205244 German, but the pics speak for themselves.

[tggzzz]

74LVC1G series gates are able to generate rather clean looking pulses, I did some experiments a while back: http://www.mikrocontroller.net/topic/217945#2205244 German, but the pics speak for themselves.

That is indeed a very good risetime, and, if my very rusty German can be trusted, is probably limited by the scope.

A decent measurement is worth any amount of conjecture; thanks.

[T3sl4co1l]

Yeah, from those pictures I would guess it's more like 600ps or less, of course there's going to be some more "crunch" if you view it with a proper say 3GHz+ scope.  It'll be a little sharper, but you'll also see parasitics you didn't think were possible (offhand -- the grounding lead has maybe 2-5nH of inductance, and the whole circuit itself maybe 1pF to ground plane -- overall, a 1/4 wave stub ca. 2.2GHz).  The gate probably doesn't go quite fast enough to excite that major resonance, but probably has enough junk up there to leave some squigglies.

I'm not really sure what the ~500MHz supply resonance seems to be; maybe something with connector leads and matching.  It's pretty low amplitude, so not a big deal, but there nonetheless.  There's probably more components to it, that aren't seen due to bandwidth.

The "<2ns" rating they give the logic family is limited by load capacitance and supply voltage; at 3-5V supply, the pin drivers are pretty darned stiff, and especially if the load is impedance matched rather than bulk probe capacitance, the actual rise time can be a bit better than that.

Tim