DIY Logic Analyzer Probe and Pods for Siglent (and LeCroy) scopes

[tautech]

i prefer, and suggest, and recommend to use some sort of steering of the pcb into the scope LA socket,
this way it goes in correctly, stay in right angles, and this way the scope part will live longest possible,
the work is worth it, if anyone like fusion files, or step files, or stl files for free, simple PM me.
AND you are also welcome to get gerber files or altium design files

I suggest you write up the 3d part of the project and add the files here:
https://www.eevblog.com/forum/testgear/replacement-knobs-feet-and-fittings-for-test-equipment/
Don't forget to add a link back to this thread. 

[oz2cpu]

thanks for the link, I update my files at thingiverse, and see if that site also accept gerber zips

[tautech]

thanks for the link, I update my files at thingiverse, and see if that site also accept gerber zips

Just add the links into your posts.

[oz2cpu]

i stole your idea, and put all important external links to topic post one, this is a good way to add higher user experience
i wish more people will do this, lets recommend all to do that

[oz2cpu]

to Mike, thanks for your great drawings about test pod design, and about putting all 16ch into one pod for test leads beakeout
at first glance it looks very smart, and your cables to scope, can be more nice this way,
but lets think about it :
all other brands i have used and can think about, are using a 2 x 8 ch pod design, with a split cable configuration to the scope,
so why are they doing it this way ?
maybe the reason is :
if you only need 1-4 ch, you use the analog ch.
if you need 8 digital, you use one pod,
if the pcb is rather large and 4 bits are located in one area far away from 4 other,
you can use analog and digital, this way the single wire test leads to the pcb can still be short, better for signal integrity,

IF you need 16 ch digital ??
most likely they are not in the same area but in two or more locations on a large pcb,
so it will be an advantage if you got 2 x 8 ch pods, so each single wire test lead can be as short as possible,

am i wrong ?
PS: JCL say the pod pcb is send several days ago, still not here yet

[mawyatt]

Please review the sketch again, the design uses two PODs but only one for bit 0-7 is shown. The other POD would be for bit 8-15, but not shown. The PODs have 16 pin header connectors for the Probes leads and the interface cable which can be a regular 16 wire ribbon cable with GSGSGSGSGSGSGSGS, or 8 twisted pairs, or 8 coaxial cables and interchangeable with different lengths. The base unit interfaces with the scope and has two 16 pin headers connectors for the 0-7 and 8-15 separate cable interfaces. Also note that you can forgo the use of the PODs and directly connect the Probe wires to the base if you want, but this doesn't have the network for the probe lead interface with the high value series resistor, so over voltage protection would be compromised.

I'm not too concerned about the header connectors impedance levels (using your idea of end PCB mount) and mismatch adding much additional signal corruption, but this needs to be addressed with some measurements and maybe simulations to verify.

In summery you have two PODS and two interface cables to the Base, all have connectors for added flexibility in cable types, length and placement.

Best,

[oz2cpu]

thanks for the correction Mike, your are right.
another advantage to make it this way : is most likely normal of the shelf IDC cables could be used,
how much is the special twisted types better, over straight flat normal, at this speed, and short length

[rf-loop]

at this speed,

can you specify it.
Fundamental square freq what ever is not important but what are edges speed and not even what is probe/interface speed. Meaningful is this signal speed where probe is connected. It makes most of bad things - if any, where cross talk is one of very serious problem what need take seriously. Even when signal pulse stream is 1 or 10MHz but if DUT risetime is in ns class it is easy cross talking even over SGSGSG... flat ribbon. It need think, scope LA probes are connected to unknown signal where can be "what ever" except over voltage.  Cross talks are very extremely annoying when they exist and can rotten measurements. Naturally one solution is reject edge speeds what can go to cable. Older SDS1000X+ model have ribbon LA probe cable SGSGSGSG...  and it cross talk easy with fast edges. I think it is same SPL1016 probe what is today for SDS1000X-E what have external probe interface to scope but probe itself is same.

[mawyatt]

thanks for the correction Mike, your are right.
another advantage to make it this way : is most likely normal of the shelf IDC cables could be used,
how much is the special twisted types better, over straight flat normal, at this speed, and short length

The ribbon cable will be the worst, then IDC, with ribbon twisted pair next and the coaxial cable the best I suspect. Having this type setup makes it relatively easy to do a comparison of the different cable types. We've ordered a couple different types of ribbon twisted pair, and the ribbon, but don't have a low cost source for the coaxial cables. Another type of ribbon twisted pair has a shield around the entire ribbon, this should be better than the unshielded ribbon twisted pair I believe. Haven't found a low cost source for these either.

https://www.digikey.com/en/products/detail/3m/1785%2F60%2520100SF/1190424?utm_adgroup=Flat%20Ribbon%20Cables&utm_source=google&utm_medium=cpc&utm_campaign=Shopping_Product_Cables%2C%20Wires&utm_term=&utm_content=Flat%20Ribbon%20Cables&gclid=CjwKCAjw9MuCBhBUEiwAbDZ-7lfmaQmWYfxxI9q57kl3Y86O2jPrS2SEoI_EODoIM_kYkceup0tjxRoCGrEQAvD_BwE

We need to do some 3D EM modeling of the end feed header & connector to get an idea of what this looks like electrically. A little Red Neck Engineering [term for us folks born is Southern USA that like beer ] and without any proper 3D EM tools, gives a very crude estimate of the end feed header and connector as a small section of transmission line of ~180 ohms, with a delay of ~150ps. Here's a crude estimate of the waveforms as "seen" by the Scope, the Probe, and Ideal Signal Source.

As a grad student we would do anything for a beer, never outgrew this limitation

Best,


Edit: Added 2nd plot which shows the effects of the input Probe lead as ~270nH based upon a 26AWG wire of ~200mm long, inductance estimated based upon Grover's Single Wire Equation. Scope waveform shows ~3.8ns mid-point delay.
 

[oz2cpu]

mike ? did you look into the math about twisted pair cables ?


https://www.allaboutcircuits.com/tools/twisted-pair-impedance-calculator/

[mawyatt]

Yes, we've looked into the math and the data sheets from 3M for the twisted pair. The single wire as used for the Probe lead wire and the Ground lead wire must be estimated from the self inductance of a single wire not a twisted pair tho.

Here' a simplified model we're using for the LA, later the PCB characteristics for the Base unit and the POD will be included, which will be followed up with some measurements. Note that the Scope PCIE connector and other details haven't been included yet. The model will be augmented as needed with additional components and parameters to better reflect the actual hardware envisioned as we move forward.

Also, working towards getting to a level where we can use 3D modeling and printing to create this structure, so will take some time since no prior experience with either.

Edit: Here's a controlled impedance cable "back of the envelope" concept (when you don't have the proper cables readily available) we've wanted to try but never had the time. Should show a much better signal to signal coupling and a lower intrinsic impedance approaching what a proper coaxial line would produce over a single ribbon cable. Uses a standard ribbon cable with SGSG orientation, but with another ribbon cable on top and bottom glued into the groves between the wires of the main center ribbon cable. This should approximate a coaxial cable and have an impedance of ~80 ohms as shown. Might be worth playing around with since most folks have the standard ribbon cable available and it's inexpensive, you could shroud the 3 ribbon cables with some thin heat shrink to make it more durable and look nicer.

Best,

[tautech]

Mike, when I get a chance with a ~2ns pulse source and 1 GHz scope I'll scope a SPL2016 channel or 2 for you to compare against your simulations.
Should be later today after I've ticked a few other jobs off.

[tautech]

Mike, when I get a chance with a ~2ns pulse source and 1 GHz scope I'll scope a SPL2016 channel or 2 for you to compare against your simulations.
Should be later today after I've ticked a few other jobs off.

20ns pulse with 2ns risetime ex SDG6022X.
3.3Vpp into SPL2016 grabbers.
Measurement at SPL2016 PCIe plug with SDS5104X 10x 500 MHz probes. Scope floated to use SPL2016 Gnd path for probe reference.

[mawyatt]

Mike, when I get a chance with a ~2ns pulse source and 1 GHz scope I'll scope a SPL2016 channel or 2 for you to compare against your simulations.
Should be later today after I've ticked a few other jobs off.

20ns pulse with 2ns risetime ex SDG6022X.
3.3Vpp into SPL2016 grabbers.
Measurement at SPL2016 PCIe plug with SDS5104X 10x 500 MHz probes. Scope floated to use SPL2016 Gnd path for probe reference.

Thanks Rob, I'll need to try an create a model for the Siglent SPL2016.

The impedance of the coaxial lines is lower, likely around 50~60 ohms, but how long are the coaxial lines, and how long are the probe leads and ground lead? What is the tip capacitance of the scope probe used, I'll need to include that to estimate the effects of the scope probe, and was this measured with the SPL2016 plugged into the scope or stand alone? From the looks of the pulse shape it's stand alone so isn't getting the full influence of the PCIE connector in the scope and the loading effects.

All this will help get a better estimate of the SPL2016 behavior.

Edit: Also what is the DCR reading from LA probe tip to the PCIE PCB edge connector?

Cheers,

[mawyatt]

[ Specified attachment is not available ]

Mike, when I get a chance with a ~2ns pulse source and 1 GHz scope I'll scope a SPL2016 channel or 2 for you to compare against your simulations.
Should be later today after I've ticked a few other jobs off.

20ns pulse with 2ns risetime ex SDG6022X.
3.3Vpp into SPL2016 grabbers.
Measurement at SPL2016 PCIe plug with SDS5104X 10x 500 MHz probes. Scope floated to use SPL2016 Gnd path for probe reference.

Rob,

After some analysis and estimating what we "think" Silgent has done with the SPL2016, here's a first cut at simulating such per your measurement.

Best,

[tautech]

I'll need to try an create a model for the Siglent SPL2016.

The impedance of the coaxial lines is lower, likely around 50~60 ohms, but how long are the coaxial lines,

1150mm from PCIe plug to lead breakout connector.

and how long are the probe leads and ground lead?

A further 200mm, 150mm

What is the tip capacitance of the scope probe used,

Apparently 11pF
https://siglentna.com/wp-content/uploads/dlm_uploads/2020/02/SP3025A_3050A_Users_Guide.pdf
Have SAP1000 with 1.2pF if you need another measurement with that.
https://siglentna.com/product/active-probe/

I'll need to include that to estimate the effects of the scope probe, and was this measured with the SPL2016 plugged into the scope or stand alone?

Stand alone.

Also what is the DCR reading from LA probe tip to the PCIE PCB edge connector?

91.1k

[oz2cpu]

91k1 ?? did you double check the trigger levels ? at super low speed ?
and a super high speed ?

my unit is more correctly triggering at the right spot with 120R + 86k6 // 8p2

[mawyatt]

Rob,

Thanks for the data, here's what we came up with as a quick estimate model of the LA. The Digital Input pulse was manipulated to try and create what we think the actual pulse to the LA looks like, and show the offset as shown on your DSO measured trace above.

The Digital Probe wire self inductance is based upon 200 & 150mm of #26 AWG wire, the 1100mm coaxial cable (shown as twisted pair in schematic) is modeled as having a Zo of 45 ohms and delay of 6.1ns based upon a velocity factor of 60%. Later we'll need to see how the twisted pair cable (and ribbon) rather than the coaxial cable effects these simulations.

Still slowly working my way thru the 3D modeling tools, and waiting for the 3D printer to ship. Custom PCBs are being developed and hopefully at some point will be able to create a 3D printed base and POD units using connectors for the Base to POD twisted pair cable (and ribbon), maybe even a coaxial version if a low cost cable can be acquired.

BTW we had to remove the models for the connectors used for the Probe lead interface, and the POD to Base for the coaxial cable interface. They were causing convergence and simulation artifacts (problem with transmission line simulations). Rather than fiddle with the simulation parameters and integration methods, we just removed the models knowing from experience they won't have much effect on the results, later as we fine tune things we may reintroduce these connector models as a verification check.

Anyway, here's what we've got so far.

Best,

[oz2cpu]

finally got a nice stack of POD pcb's today
they fit perfectly into the 3D printed shells

now i pack and ship to the first one :-)

[mawyatt]

Nice 

Best,

[oz2cpu]

YES it is to you.. I also packed a stribe og the special 86k6 resistors, as i said with this value (together with 120 ohm)
I get the most accurate trigger point
I think delay time, and match is much more relevant, but hey, let also get the triger point right if it is that easy

[oz2cpu]

latest update of how to solder,
in your emails I refer to this page for latest info,
this way i only need to update one location

[oz2cpu]

I just got an idea, had a bunch of DVI cables, and took a look inside,
wow perfect, 4 pair of perfect thickness wires, and 5 even thinner wires, perfect for electronic DIY :-)
50cm cables

[oz2cpu]

and here is a little video
https://youtu.be/aK7hYr5Y-6Y

when more people get more used to working with the LA
I love to hear from you,
I recommend to turn deskew down to zero if you only use digital channels.
since a deskew setting will move all digitals, even if triggering on digital, and only showing digital,
this is think is a bit odd.

but ofcourse if you need to combine digital with analog, you need to dial it in,
my set need 13ns (50cm wires)

[Jeff C]

Wow, great idea with the DVI cable! Unfortunately I just threw out about 20 50 foot long parallel cables at work.   
I bet those would have worked out nicely. I guess I’ll have to see if there are any other unused ones still left