Alternative would be to use a cheap microcontroller perhaps with some extra needed logic, to emulate such a device.
Nice project for someone with the time
Bear in mind these parallel NVSRAMs are connectd right to the CPU bus and therefore are accessed quite fast. The CPU doesnt wait for your µC which will take well above these 80ns to decode the adress lines, get data from somewhere and output it... Same access timing for the RTC too.
You would need some external SRAM which is loaded by the µC upon boot time and shadowed back upon power-down (using an supercap for power hold-up), or parallel FRAM.
Updating the RTC values would be tricky as you cant ensure that your writes dont collide with any access from the host system. So you will basically need a dual port sram at least for the RTC registers, which pretty much kills the idea of doing it "simply".
So, use a regular SRAM, a little logic to decode wether the ram or the RTC (you should be able to find a RTC chip with the same register set as is used in that module) is accessed, and some battery switchover logic (and an external battery).
Maxim still supplies at least some NVRAM controllers with integrated RTC for acceptable prices, so you might be able to find one to replace that module with.