Tektronix marketing gone mad? Replacing top-end TLA7k line with scopes?

[TiN]

According to their TLA7000 product page, it is happening, as they suggest MSO 5/6 series as a recommended replacement? 
For highly-flexible synchronous-clocking real logic analyzer with some MSO's. Really? Or does that mean that no customers want parallel analyzer that can go multi-GHz datarates anymore with hundreds of channels, and they dropping the line as too expensive to maintain? After all there are modules for TLA7k series to do protocol decoding on PCIe Gen3, pattern generators and 7BB4 with 20ps sampling mode. Sure there are no easy way to add custom decoding and Tek lacks of integrated supports of every day buses, but that's purely due to lack of software. Even just one engineer dedicated to such project could bring all I2C/SPI/LVDS decoding easily for TLA series.

I do hope they actually will have another line of real TLAs soon, that would explain obsolescence of old TLA7000. But somehow I feel that's not what is happening, and it's another EOL'd product in long line, that has no functionally equivalent modern replacement? 

[0culus]

I think the rationale is that, due to more and more VLSI, fewer industries have a use for a traditional logic analyzer anymore, outside of manufacturers of RAM and probably defense related areas.

[0culus]

Sure. All I'm saying is that since most devices out there aren't implemented in straight up TTL or CMOS anymore, the market for dedicated logic analyzers is bound to be much smaller than it once was. Keysight still makes LAs though.

[nctnico]

Still it marks the end of an era. But IMHO logic analysers have been made obsolete due to everything becoming serial and oscilloscopes with digital inputs. I still wouldn't want to be without my Tektronix logic analyser even though I use it only a couple of times per year on average.

[0culus]

I have a TLA715 with a pair of 7N4 plugins. The ability to do state acquisition is sometimes absolutely invaluable, and is a missing feature from most MSOs. Additionally, the TLA software provides a robust state machine for defining trigger conditions. I agree that it's an instrument I'd not want to be without. [edit] and you can use qualifier signals to capture the clock edges you want.

[TheUnnamedNewbie]

I don't think anyone there really believes a scope can replace something like a TLA7k, but that the demand for such state logic analyzers is simply too low for them to continue making them - and they suggest bits of their scope line-up as the 'best match' they can offer. Serial is taking over in the communication world (which is why we get toys like 110+ GHz scopes), and instead of probing in parallel, I think boundary scans and internal-shift-registers are becoming the way to debug things when it comes to very large parallel buses for memory.

[Old Printer]

There was a thread that had a link to this article a while ago but I cannot find it, so I am posting it here. I thought it was a very good read.
https://www.linkedin.com/pulse/who-won-logic-analyzer-wars-barbara-aichinger

[mikeselectricstuff]

The ability to do state acquisition is sometimes absolutely invaluable

R&S RTM has a clocked parallel bus  decode mode, which is probably as close as you'll get to state functionality.

[DaJMasta]

Maybe them making scope modules for their LAs made their marketing team think that was what they were for?  Maybe they think their MSO pod with scope channels sufficies for most of their customer's applications?



My guess is that they are getting out of the LA market (since it's probably transitioned to custom installations in factories and labs) and they want to avoid saying they are getting out of the LA market.

[Gyro]

Sure. All I'm saying is that since most devices out there aren't implemented in straight up TTL or CMOS anymore, the market for dedicated logic analyzers is bound to be much smaller than it once was. Keysight still makes LAs though.

I wonder if Daniel will be able to give any indication about Keysight's LA intentions. They may either follow Tek, or see it as a marketing opportunity.

[rsjsouza]

Too bad I haven't seen this two weeks ago; Tek and Keithley engineers came to my work to showcase their newer DAQ, SMU and MSO 3/4/5/6 series. I would have loved to ask them exactly this, although I saw a PCIe decoding demo on their MSO6 and they promised DDR4 LA functionality as well.

P.S. The MSO4 scope I actually played was quite capable but had a terribly slow and inconsistent UI. It would drive me crazy.

[Black Phoenix]

Considering the OP works for EVGA, I'd say troubleshooting high speed (near-10 Gbps GDDR) signal is a common task.
Sure, the most heavy lifting is done by NVidia and VRAM IC makers, but layout plays an equally important role.

Specially when you are doing your own version of a board that it's solely propose is to be the best in terms of high frequency OC under exotic cooling, as the EVGA Kingpin cards are, beating the normal bin from the Nvidia samples.

[EEVblog]

I don't think anyone there really believes a scope can replace something like a TLA7k, but that the demand for such state logic analyzers is simply too low for them to continue making them - and they suggest bits of their scope line-up as the 'best match' they can offer.

Yep, that's exactly what's happened.

[EEVblog]

I wonder if Daniel will be able to give any indication about Keysight's LA intentions. They may either follow Tek, or see it as a marketing opportunity.

Keysight wouldn't have the same pressure to streamline product lines that Tek have.

[nctnico]

Considering the OP works for EVGA, I'd say troubleshooting high speed (near-10 Gbps GDDR) signal is a common task.
Sure, the most heavy lifting is done by NVidia and VRAM IC makers, but layout plays an equally important role.

Specially when you are doing your own version of a board that it's solely propose is to be the best in terms of high frequency OC under exotic cooling, as the EVGA Kingpin cards are, beating the normal bin from the Nvidia samples.

But even for such boards a logic analyser isn't going to help much. The digital signals are all RF design territory so you'll use field solvers to see if the traces have the right impedance and power plane/distribution simulators to check the power distribution. Probing high speed DDR memory traces is already tricky and boards are so dense there simply isn't room to attach a typical logic analyser probe.

[mikeselectricstuff]

And of course for FPGA debugging you can add an on-chip analyser to the FPGA fabric