And I wish I could afford the HP 547A current tracer mentioned earlier - its amazing that something like that isn’t available today at some affordable price. There must be a reason those things go for $500+ in good condition…
Vanishingly rare, mostly, rather than because they were excellent and unreproducible. I have one and don't really use it because modern data rates and board densities reduce it's usefulness. But there are modern equivalents. See EEVBLOG #296 and Mikes's Electric Stuff's very creative review of the same product (making a 3d magnetic map of the board).
There was a project on here to build your own using a honeywell magnetic sensor. I bought a sensor but haven't got around to trying it.
Both these are a bit niche as is evidenced by there not being a cheap, widely available equivalent despite being ancient designs.
They might be useful to sku_u but he's looking for solutions to microprocessor-based instruments with external ram and rom, which often fail because of address decoding or data bit errors. A wide logic analyser is kind of overkill but does actually do a really good job as long as you have a decent probing solution.
For machines with a 40-pin DIP CPU (a lot of them !) I recommend a 40 pin dip clip with the LA probes connected to address, data and control signals - enough to get an instruction trace. Maybe add a few external signals such as chip selects on rom and ram chips. Capture the first few hundred cycles out of reset. This is long enough to do plenty of instruction fetches and, critically, some stack access,
Examine the trace, verifying :
1. What happens at reset ? Typically it should fetch a reset vector, access a ROM and then start executing there. Is it sensible ?
2. Are all the data bits active ? any appear to be shorted together or stuck high / low ?
3. Watch a call occurring (the PC should get pushed onto the stack, maybe with other things)
4. Find the corresponding return. Does the same value get pulled from the stack or has it been corrupted ?
These will show up most of the common problems around a CPU/RAM/ROM core. You might be able to extend it to some I/O and a larger range of address bits but I have used this heavily when training production technicians to debug new builds that pass ATE but don't work. Both 8086 and ARM2/3 machines. These are especially hard because they often have multiple faults - they have NEVER worked. Most repairs are on bits of equipment that worked until they got a fault and then were sent for repair - so they only have one fault. Old equipment thats been rusting for years may have more but they're often in very different areas (logic, power supply, hard discs).
This procedure feeds back into the initial question slightly.
You want an LA that's wide enough for all address, data and control buses and a few extra too. This means 32 bit for 8 bit machines and more for 16 bit machines. Not many 32 bit busses in this era. but Acorn Archimedes is an exception - though the conditional instructions makes it a bugger tom determine execution path other than through the address bus.
Some machines (8086, Z80) have a multiplexed address/data bus. Thius reduces the nuber of pins you need to moinitor but requires a state clocking mechanism that can record both data and address phases. I think this needed an external hardware bus processor for the 8086.
Huge depth is not necessary (though it's nice). Even with 1k depth you'll usually see a stack call & return, and if necessary you can trigger on ram accesses over a small address range. This is the advantage of the complex state triggers these LAs have.
A disassembler (possibly including special hardware) is also very helpful to make the instruction stream more readable.