As with a lot of other things the METAS VNA Data Explorer can be great help with this task too.
On the main screen you have the possibility to look at time domain representation of your s-parameter data. Moreover in a separate dialog it can also do time gating.
The only two gotchas are that 1. it doesn't convert to normalized impedance, it only displays reflection coefficient. Second the frequency spacing has to be so that the first frequency equals the frequency step. (E.g. 10MHz, 20MHz, 30MHz...,)
As an example here's a via I just worked on:
You can see the interations as I adjusted the features. Started from black, ended up at green.
The two peaks at 60 and 100ps are the two outer layer pads, while in between, esp at the peak at 85ps you can see the coax like barrel of the via. (The board is ~2mm thick)
From here it is iterative, looking at which sections seem more capacitive or inductive and adding or removing copper accordingly.
Another useful trick for this method is that you can often simulate your structure to significantly higher frequencies than what it could do in real life. The highest frequency in your freq domain data determines the time resolution after it's converted, thus a wider freq sweep will result is improved spatial resolution. Above example was simulated to 60GHz.
With all that said for the longest time I've been looking for good literature on this topic. I've seen industry veterans use the weirdest of conductor shapes and I'd be very interested in a good, half theoretical / half practical guide about those. If any of you have tips please share.