SMA connector footprint design project

[null-a]

I've designed a PCB footprint for an SMA connector as part of trying to teach myself something about RF electronics. I'm sharing some info about this here in case it's of interest. I'd also very much appreciate feedback on this from the experienced folk around here. Thanks!

My goals were:

• Have the footprint accommodate the cheap SMA connectors commonly found on ebay etc.
• Design for JLCPCB's default 4 layer stack up
• Transition the footprint into a microstrip line
• Aim to get acceptable performance up to 8 GHz

My approach was to model the connector (simplified) & transition in openEMS (https://www.openems.de/), noodle with that to get s11/s21 looking as good as possible, transfer the design to KiCAD, order a board, and then measure it on my LiteVNA (https://www.zeenko.tech/litevna). Images corresponding to each of these steps are attached.

A few notes on the footprint itself:

• I've removed the ground beneath the signal pin pad. I tuned the width of this cut-out using the simulation.
• There's a linear taper between the microstrip trace and signal pin pad. The length of this was tuned using the simulation. The ground cut-out also tapers.
• There's extra copper at the pcb edge end of the signal pin pad, because I discovered it improved the response at higher frequencies in the simulation. I guess what's happening is that this introduces extra capacitance, which compensates for (/resonates with) the inductance that arises as a result of the ground plane not extending all the way to the board edge.

The end result is an s11 < 20 db up to 8 GHz (well, kinda...), for a board with two connectors, which seems usable for my needs.

[simplelogin.96huy@simplel]

Very nice result, looks promising on 8GHz!! Could you please share the kicad pcb project? Thanks.

[null-a]

Could you please share the kicad pcb project?

Sure -- see attached. Note that this is a kicad v5 project. (I've never managed to get more recent versions running well on my machine.)

I'd be curious to hear how things work out if you use this, and please do let me know if you find ways to improve it!

[Marsupilami]

Pretty neat using open source tools! 
Do you have measurement results yet to compare?

[null-a]

Pretty neat using open source tools!

Thanks!

Do you have measurement results yet to compare?

The s21 / s11 plot I shared is a measurement of the physical board, not the output of the simulation. Maybe this wasn't clear and caused confusion?

[Marsupilami]

The s21 / s11 plot I shared is a measurement of the physical board, not the output of the simulation. Maybe this wasn't clear and caused confusion?

Oh, I see, that's pretty good.
I'm also curious how well your sim matches the measurement results.

[null-a]

I'm also curious how well your sim matches the measurement results.

It's a good question, but sadly I don't have a good answer.

Part of the problem is that the I'm only simulating one (simplified) connector (in one direction), yet I'm measuring the combination of two connectors, a length of transmission line, and even an SMA-SMA adaptor. I did make a rough attempt at allowing for this (as best as I could, given I'm a novice at this!), and my sense was that the simulation was way too optimistic -- maybe as much at 8 dB better (on s11) at 8 GHz say. So, in general, I suspect the correspondence is poor.

On the up-side, I'm confident the simulation did at least actually help, since this transition measures much better than what I was doing before.

[Gerhard_dk4xp]

I did mostly the same, not with simulation but with a TDR. The first try was my
standard SMA decal found in my Altium lib, probably for the normal 1.6 mm FR-4
with thick center conductors on the sma. JL on sci.elecronics.design (usenet)
wrote he measured IIRC 80-90 Ohms for these SMAs in free air.

ed. not for the barrel but for the part that will end up on the board.

Not much reserve for the local capacitance of the board.

I did a 4 layer board at  JLCPCB with 4 tiny LMX2594 synthesizers and had free
space for test structures. I tried 2 of the fat SMAs, interconnected with a 12 mil
line. 11.5 mil on top and GND on the inner layers are 50 Ohm according to the
JLCPCB impedance calculator. And yes, the calculator is exact.

On the TDR it showed that the 12 mil line was not too bad, but the SMAs had
locally much too much capacitance (notch in the impedance/reflected voltage
line). Even the amount of tin played a role.

In V2 of the board, i made the center pad of the SMA much smaller and did
cut outs on the inner layers. The notches were gone, very slightly inductive now,
sorry, I cannot find the screen shot. Consider it slightly overcompensated, but
MUCH better.

But the SMA is now a Rosenberger and not cheap Chinese. The inner conductor
is MUCH thinner. If you find a cheap SMA launcher with a thin inner conductor,
I'm all ears.

I did some fancy corners on the 12 mil line to see if I get punished, but no, in
comparison to the SMAs, that's harmless. Only the first picture is with the fat SMA.
The picture SMA_cutout.png is taken from the V2 synthesizer, not from the test structure.
Apply the lessons learned immediately :-)

On that exerpt of the amplifier output:  (SMA_cutout.png)
Red is top, green is bottom, blue is inner layer 1, layer 2 is invisible and unimportant.

I don't think that the taper will play much of a positive role, it will in contrary increase
the capacitive load.

regards, Gerhard

[Marsupilami]

Part of the problem is that the I'm only simulating one (simplified) connector

You can overcome that by useing a linear simulator (e.g. Qucs / QucsStudio) and cascading your connector model with a transmission line.


This is a very good result at -20dB, but the point is to ensure your prediction ability based on simulation for the next design.
Anyway, good job, again.

[Marsupilami]

I did mostly the same, not with simulation but with a TDR. The first try was my

That 50G TDR module tho.

[Gerhard_dk4xp]

The TDR is 18 GHz only. PicoSecondPulseLabs had a proposal to use
that 50G plugin with one of their step generators as a TDR.
When TEK bought PSPL, the app note was gone in record time.

Usually, I avoid the 50G plug in for fear of killing it. The center
conductor is isolated by air, only held in position by a mica disk.
The sampler is also quite delicate.

[null-a]

You can overcome that by useing a linear simulator (e.g. Qucs / QucsStudio) and cascading your connector model with a transmission line.

Great. The "rough attempt at allowing for this" I alluded to was me doing something similar with scikit-rf. I'm aware of qucs but haven't tried it out yet, but this looks useful. Thanks.

Anyway, good job, again.

Thank you.

[eb4fbz]

The TDR is 18 GHz only. PicoSecondPulseLabs had a proposal to use
that 50G plugin with one of their step generators as a TDR.
When TEK bought PSPL, the app note was gone in record time.

 an-05c-10ps-tdr.pdf (489.11 kB - downloaded 74 times.) 

[Gerhard_dk4xp]

The old retired heroes of PSPL and TEK seem to want to prove that the value
is in the brains and not in the sold company.

<  https://kh6htv.com/pspl-app-notes/     >

What a load of knowledge!


<  http://qucsstudio.de/de/start/   >   should be available in English, too.
I get German language, probably by autodetect.
The studio version is by the original author, still supported.


There is a tutorial by Gunthard Kraus
<  http://www.gunthard-kraus.de/qucsstudio/index_qucsstudio.html   >

Gunthard went silent key a month ago, so grab it while you can.
He will be  missed.

Gerhard, DK4XP