It is supposed to go into a milled enclosure with a wall thickness equal to the length of the PTFE insulator. The center conductor lands directly on a 50 Ohm PCB stripline.
If everything is made precisely, this could have an VSWR of 1.2 or less up to 18GHz.
I've just modeled the transition in CST just to illustrate my point better (some of the people don't get it by the looks of it).
There is a rear part of the connector with the dimentions from the drawing (first post), then the center pin goes onto a pcb. There are two simulations with two different PCBs. The substrate material is Rogers RT5880 (it is basically PTFE) in both cases. The thickness of the first board is 0.254mm, of the second board - 0.508mm. Microstrip widths are 0.77mm and 1.56mm accordingly.
The results show significant capacitive discontinuity (as to be expected, see TDR plots). In the second simulation it is significantly smaller due to wide microstrip. Although it is possible to further compensate the second transition by narrowing down the microstrip under the pin, it is not much one can do to get even 1.3 VSWR in the first case. If, however, we choose a substrate with higher dielectric constant (in case of, say, RO4003 or 4350) then the track width will be even more narrow thus making the problem even bigger. Imagine what happens if the substrate E is as high as 10.
The background material of the model is PEC, there is some air over the PCB (there is a hidden cube made of vacuum) and the upper boundary is open, the others are conductive.
Am I missing something? How would you compensate the transition in the first case?