Half-decent diy RF generator utilizing AD9951 - an idea

[DC1MC]

I'd say grab a quad or find another tuner , for a triplet attenuator the results are pretty OK, also have a look on this article:
http://www.mwrf.com/semiconductor/diode-quad-foundation-pin-diode-attenuator

[Yansi]

So you say the curve gets better, if the diodes will be paired and in the quad configuration?

//EDIT: Here is the PIN's nest...

[ogden]

//EDIT: Here is the PIN's nest...

You shall consider programmable (digital step) RF attenuator as well.

[DC1MC]

Generate the voltage with a DAC, and presto, programmable RF attenuator  . 

[Yansi]

I think I will rather not. These come usually with only very limited attenuation ranges (16/32 dB typical is what I have seen), secondly they usually can not work from DC signals and I would guess they will degrade the linearity more, than a single PIN quad attenuator (but just a guess). The biggest disadvantage is their attenuation step is not small enough. Typically 0.5dB. That is not what I want.  And of course the cost of a PIN quad is insignificant fraction of a $, compared to a digital controlled step attenuators.

Using the pin quad I can easily achieve much larger attenuation range while not being limited to attenuation steps - as the PIN att. is analog voltage controlled. Using a sensible design considerations, I will be able to get easily better than 0.1dB calibrated resolution of output amplitude.

I do not see much if any advantages of using a digital step attenuator. Or do you have any specific part numbers to consider?

//Yes DC1MC, that is my plan the whole time   But not only DAC, but a whole ALC loop.

[phenol]

your band switching diodes are not necessarily pin diodes. The datasheet has no mention of carrier lifetime, i layer thickness, etc. These parameters limit the lower frequency range before the onset of non-linear behavior (rectification) and severe IIP3 degradation. There are special pin diodes with thick intrinsic layer for sub-MHz operation. I’v seen people use strings of 1N4007 as pin attenuators and switches at HF frequencies... Anyway, there’s a good reason why marconi sg has two paths-HF and LF- with two different leveling mechanisms.
A properly compensated dual-gate mosfet may work as an early small signal gain controlled stage with a range of more than 20-30 db of(hopefully) linear performance.

[yl3akb]

I think I will rather not. These come usually with only very limited attenuation ranges (16/32 dB typical is what I have seen), secondly they usually can not work from DC signals and I would guess they will degrade the linearity more, than a single PIN quad attenuator (but just a guess). The biggest disadvantage is their attenuation step is not small enough. Typically 0.5dB. That is not what I want.  And of course the cost of a PIN quad is insignificant fraction of a $, compared to a digital controlled step attenuators.

Using the pin quad I can easily achieve much larger attenuation range while not being limited to attenuation steps - as the PIN att. is analog voltage controlled. Using a sensible design considerations, I will be able to get easily better than 0.1dB calibrated resolution of output amplitude.

I do not see much if any advantages of using a digital step attenuator. Or do you have any specific part numbers to consider?

//Yes DC1MC, that is my plan the whole time   But not only DAC, but a whole ALC loop.

Why do You need range larger than 20..30dB? Cant You just switch in those 20 dB attenuators in, when needed? Also, small nonlinearity (no dips like that though) should be taken care by negative feedback.

[Yansi]

Well I have thought about that too.  I have found this PDF file from Vishay, that seems to state that BA283 are example of a PIN diode. See page 4, the "PIN diode" paragraph: https://www.vishay.com/docs/84078/84078.pdf 

In the BA283 datasheet, it is mentioned as a switching diode for 50-1000 MHz, which indirectly states what the carrier lifetime in the PIN might be.  Maybe the intrinsic region in these diodes is not that wide, but who knows.

Compensated dual gate mosfet you say? That seems interesting too. Because if I will be able to obtain a bunch of T1-1T-KK81 transformers, I will then be able to go from 80kHz or so with the DDS, but the the PIN quad BAP64Q will be useless for this low frequency end.  Using the dual gate mosfet approach this still may be possible.

Can you recommend any specific appnotes regarding such "compensated mosfet" circuits? I have  readily available quite a lot BF998 dual-gate MOS-FETs for making experiments, so I could even prototype that out quickly.


yl3akb: Because I want to have as little relay attenuator stages as possible.  But sure 20-30dB range at the ALC might be what is needed.  With a 30dBm ALC range and +13dBm maximum output, I will be able to go down to -77dBm using just two 30dB relay
pads.  Or down to -85dBm from +20dBm (which would be a lot nicer to have) with 35dB ALC range and two 35dB pads.  It all depends on measurements yet to be done.

[ogden]

I think I will rather not. These come usually with only very limited attenuation ranges (16/32 dB typical is what I have seen), secondly they usually can not work from DC signals and I would guess they will degrade the linearity more, than a single PIN quad attenuator (but just a guess). The biggest disadvantage is their attenuation step is not small enough. Typically 0.5dB. That is not what I want.  And of course the cost of a PIN quad is insignificant fraction of a $, compared to a digital controlled step attenuators.

Digital attenuators exist for a reason. Indeed many operate from DC, are quite linear and better matched than pin diodes.

http://www.analog.com/en/products/rf-microwave/attenuators/digital-step-attenuators.html

Using the pin quad I can easily achieve much larger attenuation range while not being limited to attenuation steps - as the PIN att.

I would consider to digitally ALC-regulate using DAC_Rset like shown in this appnote:

http://www.analog.com/media/en/technical-documentation/application-notes/AN-423.pdf

If 10dB range is achievable using such approach, then add external 10, 20, 40 steps and that's it.

[phenol]

By 'compensated' i really mean one having a reasonably flat gain across your range of frequencies such that the ALC loop stays in stable regulation. This means a wide-band load in the drain with ample resistive damping, if needed. BF998 may work, but something self-biased like BF1105 or similar is probably easier to control.
BF998, BF992 and the likes are frequently used in HF receiver IF strips with automatic gain control.

[RadioNerd]

How about something like that:
https://www.digikey.com/product-detail/en/m-a-com-technology-solutions/MAAVSS0006TR-3000/1465-1300-1-ND/4429997

It should be able to cover 20 dB with reasonable (log-)linearity

[Yansi]

It seems there is a large variety of how one could approach the output leveling. Lets make a summy and write the obvious  dis/advantages.

The table was made based on the following assumptions:

• +20dBm max output power
• At least down to -70dBm
• Omron G6K-2F-Y relays for the step ATT, assuming no bigger step than about 30-35dB will be possible due to not the best isolation (40dB @100MHz)
• I want the best bang for the buck (keeping the cost the lowest without seriously degrading performance)
• Not requiring any too obscure parts
• Wanting lowest possible bottom frequency

Solution			Bottom Freq			ALC Range			Advantages	Disadvantages
PIN ATT (BAP64Q)			300 kHz			>40dB			+ Cheap ($ Fraction) + Very high attenuation range (50dB) + Least amount of relays required: Probably just two 30-35dB steps (downto -70..85dBm) + Voltage controlled	- Only down to 0.3MHz
DDS DAC Bias tweak			from DC			10dB			+ No other attenuator components (apart from shitton of relays)	- Likely screws SNR/SFDR, DDS DAC not operating with optimal current - Limited range of only about 10dB ALC range - Large number of attenuator relays: At least 4, likely 5 (steps 10 20 20 30 30dB) - A sort of hack of the Rset pin, another OPAMP required
FET Attenuator (MAAVSS0006)			from DC			20dB			+ Voltage controlled	- Starting to be a bit on the expensive side ($3+) - Sort of limited range of 20dB - Higher step attenuator relay count: At least 3 steps (20 30 30dB) downto -80dBm - Control voltage needs to be NEGATIVE, but could be hacked for positive too
Dual gate NMOS			almost from DC			maybe 25dB			+ Cheap + Voltage controlled	- More complicated design, thorough circuit testing required - Higher step attenuator relay count: At least 3 steps
Digital step attenuator			maybe from DC			< 32dB			+ Good 50ohm match, respectable IP3	- Can be good deal expensive - Step typically of 0.5dB - In steps, not fully variable attenuation - AM modulation not possible using this ATT

To be honest, it is quite hard to pick the poison. Some of the requirements are quite against each other. But we are not building $10.000 instrument, but just a decent toy. TBH I could live with only +13dBm output power, and even 400kHz bottom frequency. But I will try to do my best about it.
So far after reviewing the available solutions, the PIN ATT is still very nice solution.  The DDS DAC bias tweak is just a rather ugly hack and the digital step attenuator a nonsense.

However the FET attenuator is a bit more interesting, as the ALC dynamic range may be up to 25dB, requiring only 3 attenuator relays (20, 30, 30 dB steps), offering +20 down to -80dBm and operation from DC. This would let me use the MiniCircuits T1-1T-KK81 balun and achieve operation from 80kHz, which would be quite awesome.

So still can not decide between the less evil: PIN ATT or the Macom FET ATT.  The PIN ATT clearly will not operate down to DC.  But thinking about it, the Macom FET atten. solution requires just one additional relay, which is not that big of a deal, so is the price of that FET device. The price of the balun is however another story, as those TC1-1T+ mini transformers can be obtained very cheap. But having the bottom frequency just 80kHz would be handy, considering I might use the AD9910 next time. That is a 1Gsps DDS (up to 400MHz) and good luck finding such a very wideband balun (from below 100kHz) for that one.

So probably I should try attacking the solution with the Macom FET attenuator MAAVSS0006. This device is not just as much obscure it seems. It is also readily available from Mouser. (Sorry, no Digikey here guys). I will leave the BAP64Q PIN Quad for the faster 1GSps DDS.

Thanks RadioNerd for mentioning the MAAVSS0006, a nice find.

Bottomline: I know there are many more solutions to this, for example making a multi-path design separating all the LF stuff from the RF and switching between the two, but for now I will start with something easier with higher possibility of success.

[phenol]

as expected, linearity craps out at certain bias voltages with that part.  you should really measure the level of the output harmonics

[Yansi]

With what part? You mean the Macom FET thingy?  Those IP3 and P1dB have a very scary dip around 2.5V for sure. But I will try to design the voltage levels at the attenuator as such there will be enough headroom left or so I hope.

[ogden]

Most of potential choices are voltage-controlled. Maybe it's good idea to prototype PIN, FET and bias control, compare performance.

Why do you plan to use (expensive) relays for step attenuator switching? At those frequencies you can use virtually any pair of RF solid state switch, leakage is not an issue at all. After all you are not building TR switch or preselector. Even if -30dB will leak around attenuator - it's just 0.1% of added power, most likely your PI attenuator error will be worse than that

[Yansi]

Why expensive? Those Omrons G6K-2F-Y can be sourced for as low as $1.5 a piece. I do not think a DPDT RF switch will cost much lower than that, won't it?

I also have concerns about using active devices in the step attenuator: Doesn't it worsen the noise figure?  I think it will become an issue if one attempts the microvolt region down there. I mean my -80dBm is like about 100uV if I am correct, but still... What do you guys think about that?

If -30dB leaks around 30dB attenuator, the error is not 0.1%, but 50% error. The result will  be 27dB attenuation. I think that would be pretty bad.

For today, I have something special. I've managed a meeting at a local university in a lab, and some keen guy have done a quick measurement of S21 of the wide band amplifier that I have made with the NPN transistor, inspired by the Marconi output stage design.

We have done a sweep from 100kHz up to 1GHz. The gain drops off rather quickly, as the frequency increases. Please note that the measurement was done without the compensating bypass caps across the emitter resistors. Unfortunately the second screen capture with the caps got somehow lost in the transfer and there was no spare time to repeat the measurement. So maybe next time. But as far as I remember, the gain dropped a bit slower, with a two 10pF caps installed. (The transistor has physically two emitter leads).

Those ripples on the gain are quite puzzling for me, but they are supposed to be due to impedance mismatch (so was I told by the guy). We've used a rather  long coax cables for the measurement setup (maybe like 1m cables?). The measurement setup was calibrated for flat response, sure.

The input power was set that the output will be about +13dBm near 100MHz, as the schematic includes the same diode clamp topology as the Marconi. I have copied that just to see it's influence on the amp.  Next time I also plan to try to measure P1dB of that, at least for a few frequencies.  There is unfortunately no simple way of  having an easy automated P1dB measurement across a frequency span.

[ogden]

If -30dB leaks around 30dB attenuator, the error is not 0.1%, but 50% error. The result will  be 27dB attenuation. I think that would be pretty bad.

Two switches are needed, so leakage will be -60dB not -30

Those ripples on the gain are quite puzzling for me, but they are supposed to be due to impedance mismatch (so was I told by the guy).

Those ripples are cable reflections indeed. I wonder why he did not calibrate setup for measurement plane at the end of the cables! Knowing that you are getting cable reflections while measuring amplifier is kinda   Next time ask him to properly calibrate setup. At least add external 6dB attenuator at the amp input - if they for some reason do not calibrate VNA (rofl)

[yl3akb]

It looks measurement is taken with scalar network analyzer (or at least in scalar mode, if there is such thing). And with scalar analyzer it is not possible to calibrate port match, only do normalization, which will not solve the ripple issue.

[Yansi]

The calibration plane was right at the end of the cables. It was measured by a SA+TG, as I have advertised in one of the previous posts.

Btw, what would the external attenuator on the amp input help with? 

[ogden]

The calibration plane was right at the end of the cables. It was measured by a SA+TG, as I have advertised in one of the previous posts.

Ups, I missed SA+TG. Sorry

Btw, what would the external attenuator on the amp input help with?

It will act as impedance matching pad between cable and amp input.

[Yansi]

Okay, I get that. In that case, shouldn't connecting a pad also directly on the output of the measured amplifier help reducing the spurious resonances? We have had an attenuator at the amplifier output, to protect the SA (it was only 20dBm rated and the amp can definitely deliver more than that), but it was connected at the end of the coax cable, right at the SA input.

On a different note: Maybe it's a time to start making and doing, instead of theoretical discussing. So for the weekend, I will make a PCB module to be populated with the AD9951 (9954) and then will start working on the ALC module.

I want to take a modular approach for this, at least to begin with that.  After all parts will be fully working, I'll proceed to design a final PCB. I think this approach is better, as I could easily evaluate number of different solutions. For example compare ALC design using a FET or PIN attenuator.

[ogden]

Okay, I get that. In that case, shouldn't connecting a pad also directly on the output of the measured amplifier help reducing the spurious resonances? We have had an attenuator at the amplifier output, to protect the SA (it was only 20dBm rated and the amp can definitely deliver more than that), but it was connected at the end of the coax cable, right at the SA input.

For scalar measurements you better put attenuators or matching pads close to DUT, not at the other end of the cable where instrument provides correct impedance already. Obviously with VNA it's opposite - you do not try to correct impedance mismatch because you would want to measure it with S11 and S22.

[Yansi]

Roger that.    I'll try to get to a VNA somewhere.

Meanwhile I got an idea for a next (but maybe a bit more complex and interesting) project: I got a shitton of MiniCircuits Directional Couplers ZEDC-15-2B (like 10 of them) I hamstered from an old telcom equipment I have dismantled. Maybe four of those together with my RF generator could be used to make a nice diy VNA. One would only need to add a few RF switches and a receiver (I'd probably go the SDR route). 

[phenol]

You mentioned you had AD9910 in your drawer. Why don’t you start with it instead?
Also, if you give a damn about phase noise performance, the analog supply voltages have to be very clean, even more so if the internal PLL clock multiplier is engaged. For example, i saw that LM317 regulator was producing prominent side bands that tended to shrink when insanely big caps were added on the output.
All in all, i decided to not use the PLL of AD9910 due to degraded PN performance and sensitivity to power supply noise but inject the 1GHz clock externally. The voltage regulators are some sort of AD stuff meant for VCO power supplies.

[Yansi]

I have both a piece of AD9951 and AD9910. Bought them quite a while ago. I'd start with the 9951. It is cheaper and better for my training and also currently fits the basic needs.

Regarding the AD9910.. I saw that AD9957 is also 1Gsps, but has a digital I-Q modulator built in, with a parallel data inputs. It might be worth playing with this one instead.  One could make quite interesting generator capable of a ton of different modulations. And I'd like to improve my skills with FPGA / VHDL, so maybe I will leave the 9910 in my drawer and get a 9957 instead.   

Do you think the AD9951 is also that much sensitive to power supply noise? Currently I am designing a small testing board (not a final one) for it and planned to use a generic 1117 voltage regulator for the 1V8 supply rail,  while the input for the board being a generic 5V supply from anywhere.  I will post a schematic for a review once it will be finished.

As I wanted the final generator to be lockable on external 10MHz reference, it would make sense to use an external PLL anyway, as the internal one can't work with lower than 20MHz reference clock. External PLL could be used to produce a clean 400MHz reference.