Testing the effects of releaving ground plane beneth a component

[joeqsmith]

This experiment is just for the fun of it.  For some background, see the following thread:
https://www.eevblog.com/forum/rf-microwave/can-a-siggensadirectional-coupler-be-used-as-a-poor-mans-scalar-analyzer/msg3605548/#msg3605548

A few takeaway points from this thread are:

I'd like to test the level of impedance mismatch caused by component footprints on PCB microstrip layouts, up to 3 GHz.

... I already did some simulations and the results even looked real ....

... motivation is to get a reality check - can I trust my simulation setup?

A 0603 AC coupling capacitor footprint between a 50-ohm microstrip, far-end terminated by a 50-ohm coax load, One has solid ground plane and another has cut out.

My intent:

I had made up a test board using some ATC (prior to the AVX debacle) 100B RF jelly been parts.  Three caps were mounted to a test board configured as a shunt thru, series and shunt.  I could mount a fourth capacitor to the same type PCB, series configuration, using the same connectors.  We could then compare the return loss for the two PCBs.  It's not much of a test but may give you some confidence in the variance.   I could then remove  2mm sq from the ground beneath the cap and remeasure it.    I could provide you with details about the build that you could then attempt to simulate and see how the results compare. 

I would also like to use both the original NanoVNA and along with the V2Plus4 to collect this data.   The OP wasn't forthcoming with details about their particular simulation but if anyone has access to ADS, HyperLynx or other simulators and want's to donate some time, that would be very helpful.  My plan would be to provide enough detail to allow you to create a model of the hardware (assuming I am able to detect any changes).  Again, the goal is to see if the simulation give even a rough result of the actual hardware.     

To give this test any sort of meaningful result, if that were at all possible, the first thing I plan to do is make a new set up standards and characterize them against a known set rather than using the ideal model.     

Any feedback on this experiment is certainly welcome.   

[joeqsmith]

Recently I had posted a demonstration of my software for these low cost VNAs.    Part of this was measuring a capacitors ESR.   To make these measurements, I had mounted a few parts from American Technical Ceramics to a coplanar waveguide that I plan to use as a control for this experiment.   The parts I used area a 100B331JP 200X, 330pF 200V 5%.   These particular parts were produced prior to AVX taking them over.     



A second board will be assembled using a component from the same lot.  The same connectors and series coplanar waveguide will be used.  We will start by measuring the differences between two boards.   Assuming there is little difference, we will then relieve the area beneath the capacitor and remeasure the board.   Seems simple enough. 
 

[joeqsmith]

Shown are the new calibration standards along with a second test board with the ATC device mounted to it.

The range will be limited to 1.5GHz.  This is the upper limit of the original NanoVNA.  The test boards behave poorly as we move beyond this.   

I plan to use the Short and Open from the PCB standards but will use one of the sorted Mini-Circuits ANNE parts for the load to improve the return loss. 

A MidWest Microwave terminator will be used to terminate the unused port on our test boards.  This part was also sorted based on the return loss. 

[joeqsmith]

I wanted to get a feel for what sort of an difference we would see when removing material below the component as a sort of swag.  So a third board was populated with the same capacitor.   

For starts I inserted the test board several times, hand tightening the components.   I did this because so many internet experts have told me that hand tightening is every bit as good as using a torque wrench.   I then used my Dremel to cut a 1mm slit below the component and made one last sweep. 

[joeqsmith]

Several people wrote about their horror stories of damaging connectors with a torque wrench.   A common theme was how the connectors on the NanoVNA are poorly soldered and were easily damaged. 

I set out to do some destructive tests on some edge mount connectors.  Some, fairly expensive, others bottom of the barrel.   Some where not even soldered to the board.  This video should give you some idea of just how much force it really takes to rip a connector from a board.   

[joeqsmith]

I then repeated the test, torquing the connections between each measurement.  A second slit was then cut into the board and one last measurement was taken (with it properly torqued). 

[joeqsmith]

Using an X-acto knife, I cut away roughly 3.5mm of material and remeasured the board.   

[joeqsmith]

Up to this point, all of the data has been taken with an old Agilent PNA.  Now that I have some idea what we are looking for,  lets try and look at our actual test boards using the low cost VNAs.   

I'm going to go out on a limb an say the original NanoVNA is not well suited to make this measurement.  Again, I don't recommend it for use over 300MHz.  You can see it's signal starts to diverge at around 150MHz.   But, it's $50.   The V2Plus4 on the other hand is tracking the PNA fairly well.  No surprise as I have compared these two instruments in other tests.

[joeqsmith]

Attached all three VNAs measuring both the mag and phase for PCB 2.   

[joeqsmith]

Looking at the datasheet for the ATC100B331J, they provide S-parameters from 50MHz to 4GHz.    They show a resonance at 1.1GHz, 2.1GHz and 3.1GHz.   AVX requires you to register to obtain the S-parameter data, so I have attached the Touchstone file.  You will need to rename it.   

PCB2 was swept  to 4GHz.  There is resonance at  670MHz.   This shows up on PCB1 as well.   A part was inserted into my test jig.  It does not have this resonance.    I did state in the original post:   

Again, it would be very crude.

   

I am really liking the METAS software for viewing the data. 

[joeqsmith]

Not surprised no takers on the simulation side.  I hate to think of the cost.  Keysight offers a 30 day trial for ADS but it may take me that long to learn the basics.      The design is so simple, I would expect if they offered some sort of student version, it may be able to simulate the design. 

https://www.keysight.com/us/en/assets/3120-1063/configuration-guides/PathWave-Advanced-Design-System-ADS-Configuration.pdf

Another option? 
http://dd6um.darc.de/QucsStudio/screenshots.html

[joeqsmith]

The free simulator seems easy enough to use so far but ran into a problem before I even got started.  Note that when using S-parameter data, the only packages supported are SOT23 and TO92.   Pushing ahead with the SOT23, it seems to somewhat work.   I am able to change the coplanar dimensions and it certainly effects the simulation.  PCB is next....

[joeqsmith]

Selecting the option to create the layout causes the attached error.   It's possible to create the netlist and load it in but I suspect to run the simulation it all needs to be tied together. 

I joined their forum.  Maybe someone their can help get it running. 

[joeqsmith]

Looks like the QucsStudio forum censors the posts, so no luck there.     

Attempting to manually create the PCB layout, many of the library components are not supported,  which includes coplanar.   I created a new schematic using microstrips which are supported.  If I add a capacitor (you have to use the lumped model)  and wire it across a microstrip gap, the software will not include it when creating the layout.  You can however add the capacitor to the layout directly. 

The simulation starts without any errors and made it to 87% complete where it has been for about an hour now. 

Even if it would run, the software is lacking the ability to use S-parameters capacitors.  The next problem I see is that I am unable to find a way to modify the ground plane. 

[joeqsmith]

Removing the capacitor, so there is now nothing beyond a gap, the simulation will run.  Shown with a whole 4 data points (attempting to speed things up). 

Manually adding a lumped capacitor back in, the simulation will again run.   It appears not to like it when I set the range to DC min.  I suspect this is the problem I was running into before when using the cap.   If I set it to free, it throws a warning about starting at 50MHz.  Starting at 100MHz avoids this warning but without the proper model, S21 is not close to correct.   The layout does not appear to support the S-parameter model or I would try and use the SOT23 for the capacitor and add it.   

[joeqsmith]

I spent some time looking for other EM solvers but no luck.  Attached are the QucsStudio and AppCad settings along with the S-parameters for the capacitor and package size. 

I have posted a comment to Robert Feranec to see if he would be willing to help out.    He has made several top notch videos using the ADS simulator.   Check out his channel.
https://www.youtube.com/channel/UCJQkHVpk3A8bgDmPlJlOJOA

[rf-messkopf]

Looks like the QucsStudio forum censors the posts, so no luck there.

Looking at the forum homepage the last post in the "Usage" section was by user JOEQSMITH 2 weeks and 2 days ago, which cannot be correct, and your posting is not displayed when I open that section. To me this looks like a technical error. Have you tried contacting Michael Margraf?

Attempting to manually create the PCB layout, many of the library components are not supported,  which includes coplanar.   I created a new schematic using microstrips which are supported.  If I add a capacitor (you have to use the lumped model)  and wire it across a microstrip gap, the software will not include it when creating the layout.  You can however add the capacitor to the layout directly. 

Including a capacitor works for me, with and without including a microstrip gap, which I believe is not necessary for the EM-simulation. As for coplanar waveguides, I think they are currently not supported in the EM solvers layout creation tool. But you can run a regular S-parameter simulation with the built-in coplanar waveguide models, together with lumped components. This may or may not be a good approximation to a real EM-simulation. For these conventional S-parameter simulations you can also include S-parameter files.

The simulation starts without any errors and made it to 87% complete where it has been for about an hour now. 

I'm by far no expert when it comes to EM-simulations, but you can try to modify the simulation parameters when the simulator hangs (under File -> Document Settings). In the "File Properties" dialog box there is a tab "Excitation". Set "Energy Decay at End" to a larger value, as this determines the termination condition of the simulation. You can also try to modify the mesh size under "Domain". And you can always hit the "Terninate iteration" button and get the result from the current iteration.

Even if it would run, the software is lacking the ability to use S-parameters capacitors.  The next problem I see is that I am unable to find a way to modify the ground plane.

As I already said, I believe S-parameter files are only usable with regular S-parameter simulations. I have no idea how to modify the ground plane or if that is even possible from within the layout editor. Maybe only if the layout data is created externally and then imported? The underlying solver is 3D, if I'm not mistaken, so it should be able to do that. I have never used qucsstudio for such complex simulations though, only for simple microstrip filters.

Or one could try to use openEMS directly: https://openems.de/start/. Again, no expert here, and I have never done that, and there is nu GUI.

I really would like to take a deeper look into the capabilities of qucsstudio, but I have virtually no time during the coming days.

[joeqsmith]

I have not tied to contact the forum about my post from last night.  I joined and posted within a few minutes.

As I already said, I believe S-parameter files are only usable with regular S-parameter simulations. I have no idea how to modify the ground plane or if that is even possible from within the layout editor. Maybe only if the layout data is created externally and then imported? The underlying solver is 3D, if I'm not mistaken, so it should be able to do that. I have never used qucsstudio for such complex simulations though, only for simple microstrip filters.

It sure seems like this is correct. I have not tried to import the layout and assumed it all had to work together.  Without the EM solver having support for S-parameters, I saw no reason to continue.    Too bad as the software seems fairly user friendly.   

****
I suspect that the 2weeks 2days you mention is the last time that area was posted to.   Because they have not allowed my question to be posted, it had not updated the time.   See attached. 

[G0HZU]

One thing to watch out for is that the ATC s-parameter models are taken over a PCB substrate so I'm not sure it is a good idea to use them anyway. These capacitors behave differently when mounted vertically or horizontally and this is because the metal structure within the cap body acts a bit like a transmission line when mounted over a given substrate. This is part of the reason these caps have sharp resonances and they often aren't suitable for wideband design work.
 
For your EM simulations you can try playing with (free) Sonnet Lite but I think it only allows a perfect capacitor model in the Lite version. It probably will let you play with the groundplane but I've not really used the Lite version very much.

One thing worth noting is that it can sometimes be a good idea to deliberately use fatter pads (compared to the ideal microstrip width) for the component if it has a tiny amount of series inductance. The fatter pads and the series inductance form a pi network and this can help improve the s11 response up at UHF.

At work I use Genesys and Sonnet combined together for stuff like this. I've used various EM simulators and Sonnet always comes out top for the most critical tasks. It can do multi layer simulation and can allow custom groundplane shapes with gaps. When used with Genesys it allows s-parameter models allowing very good simulation of LNAs and lumped+ distributed filters. It is a very powerful combination in my opinion.

I'm not really sure what you are trying to do but I suspect there will be cases where removing part of the groundplane will actually make things worse and sometimes it will help. A lot depends on the component and the pad shape it requires. Also, a lot depends on the chosen PCB material in terms of dielectric constant and substrate thickness.

[joeqsmith]

From the OP:

... motivation is to get a reality check - can I trust my simulation setup? 

A 0603 AC coupling capacitor footprint between a 50-ohm microstrip, far-end terminated by a 50-ohm coax load, One has solid ground plane and another has cut out.

My interest was to see if I put together a simple circuit and made the change they suggested, would a simulation show a similar change (good bad or otherwise).   

It sounds like you are setup to run this little experiment and have your own ideas on how it should be conducted.  Feel free to join the fun. 

[G0HZU]

If it helps I just re-read the thread and I'm not sure what is happening between the plots test1 and test2 shown below. Test1 does look like the response for a 330pF cap but I'm not sure what has happened for test2. If I read the thread correctly this is supposed to be the better measurement because you used a torque spanner.

It no longer looks like a 330pF cap so I'm not sure what is happening here. Have you damaged something in the test setup? Is there an intermittent connection somewhere? I assume the odd trace is the one you took after the second slot cut. Again, I'm lost as to why you would see this degree of response change down at 50MHz. Can you explain test2 for me because it looks to me like something went wrong with the return loss response across 0-500MHz.  However, nobody else has spotted an issue here (including you) so I'm left confused as to what test2 is actually proving. What have I missed here?

[joeqsmith]

If it helps I just re-read the thread and I'm not sure what is happening between the plots test1 and test2 shown below.

I would say it helps. 

Test1 does look like the response for a 330pF cap but I'm not sure what has happened for test2. If I read the thread correctly this is supposed to be the better measurement because you used a torque spanner.

It depends on the perspective.  Test one was a hand tighten only causing a wide spread setup to setup.   No surprise.  Effect of cutting the board could still be detected.   Decided to repeat the test but doubt I took the time to load the cal.   I was just wanting to show how it would tighten up the measurements.   In both tests, I was getting an idea of how much change to expect and if the low cost VNAs would even be able to detect it. 

It no longer looks like a 330pF cap so I'm not sure what is happening here. Have you damaged something in the test setup? Is there an intermittent connection somewhere? I assume the odd trace is the one you took after the second slot cut. Again, I'm lost as to why you would see this degree of response change down at 50MHz. Can you expline test2 for me because it looks to me like something went wrong with the return loss response across 0-500MHz.  However, nobody else has spotted an issue here (including you) so I'm left confused as to what test2 is actually proving. What have I missed here?

Often you will find I won't take the time to calibrate the system if I am just looking for general trends in the data.  In this case, I doubt I reloaded the previous cal.  I'm guessing that's not how you are used to working.   For me, calibration is commonly the last step.  It takes time, wear and tear on the standards and may not need that level to get the basics sorted out.   Eventually, if I run the test, I will take the time to do a proper setup.   

[G0HZU]

Thanks, but regardless of the obvious s11 cal error in test2 ​take another look at your test2 plot traces that you connected up with a torque spanner. At about 20MHz you are seeing a 2dB variation in return loss each time you reconnect up the system. You seem to conclude that you have proved how good a torque spanner is compared to using fingers because this seems generally more consistent in places compared to test1.

However, at 20MHz with a DUT return loss of maybe 12-13dB even a toddler with tiny fingers could achieve remarkably repeatable results assuming the test fixture and cables are solid. Even with toddler finger torque I'd expect to see <0.1dB difference between S11 traces at 20MHz. But you have managed 2dB variation using a torque spanner...

Something is clearly wrong with your setup. Are you using cheap and nasty ebay SMA connectors with crazy tolerances? Is your PCB and/or the 330pF MLCC intermittent/cracked somewhere? Do you have a faulty cable somewhere? This might also explain why the return loss profile is so obviously wrong for a 330pF cap in test2.

[joeqsmith]

That's very true.   I could repeat the test easy enough.  The srcap board is still sitting here, with a very large hold in it. 
***
Board and terminator appear fine.   

[G0HZU]

I think it's definitely worth checking everything over carefully. In my time at work I have tinkered with countless RF dev boards and often there comes a time where repeated handling of the board finally takes its toll on something. Often a MLCC cap will crack or a connection to an SMA end launch connector will develop a microscopic solder crack or maybe an RF cable can lose some quality in its end connections. Once any of this happens the whole test system isn't your friend anymore.