An alternative to quartz filters.

[MikeP]

 Hello.

 This is not my area, so I ask you to forgive my naivety.
 In the range from 3 to 10 MHz, it is necessary to allocate several 3 kHz bands. The bands are arranged in series.
 This task is solved by quartz filters. Out-of-band attenuation - 80 dB, squareness ratio at the level of 80/3 dB - 2.5.

 My question is, what alternatives are there? Is it possible to digitize the signal for further processing, while maintaining the existing accuracy?

 Thanks.

[radiolistener]

You can digitize it and apply digital bandpass filters. But dynamic range will be limited by your ADC.

In order to maintain 90 dB dynamic range you will need to use (90-1.76)/6.02 = 14.6 = 15 bit ADC.

[MikeP]

 Thank you very much. I also came to 16 bits. It turned out that 16 bits is the limit for fast ADCs.
 It seems to me that there should be a relationship between system response time and sampling rate. What values can be obtained with the available ADCs?

[gf]

How many is "several"? Al least what magnitude? (7MHz/3kHz could be as many as > 2300)
What's the spacing between the (centers of the) bands? Are they equally spaced?
Do you need them all simutaneously, or does it suffice to tune-in one band at a time?
What kind of signal (modulation) do the bands carry? Is the eventual goal to demodulate them?
Can frequencies >10 MHz be present in the input signal as well?

I'm afraid that a 3kHz FIR bandpass with low pass-band ripple, 80dB stop-band attenuation and steep cut-off, running at a samping rate of >20 MSa/s (which is required for 10MHz - in practice rather more), may require a huge number of taps.

[mawyatt]

~40 years ago we needed to pick out a low level signaling 10Hz tone at >>50MHz that could be located at many different frequencies, heterodyning to an IF and crystal filters were "thought" to be the only practical solutions back then. We came up with a new type solution based upon a "Commutating Filter" originally described back in the 1960s which utilized a car distributor as a commutating switch driven by a 60Hz synchronous motor at 3600rpm which also drove another car distributor in synch. Each of the 8 "spark plug" connections on each distributor was connected by a simple RC low pass filter, series R, shunt C, resulting in an extremely narrow band filter centered around the 60Hz motor speed. Vary the speed of the motor and the narrowband filter moved to the new speed!

Of course we used very high speed (at that time) NMOS switches instead of a car distributor, and a low noise frequency agile synthesizer for the motor:)

Much later this led to the development of a new type passive mixer called a Polyphase Phase Mixer (our terminology), N-Path Mixer (university terminology), or Mixer First (other terminology). This new type mixer bypassed conventional thinking and produced measured results that were thought impossible (< 3.92dB NF (loss) for a passive bi-phase mixer), and the bandpass directly follows LO, even does a direct I/Q downconversion. The mixer input 3rd intercept is defined by the switch linearity, which can be quite high for large NMOS switches. In fact this circuit was so controversial and unique it created a DARPA workshop all it's own back in 2013, called Mixer First, everybody involved in advanced unconventional signal processing research was there, standing room only. We were asked to present at the workshop, although most of our work was/still is proprietary. The first public papers on this subject are from Cornell around 2009~2011 in the IEEE, authors are A. Molnar and C. Andrews, first publicly discussed at the IEEE ISSCC in 2009.

[radiolistener]

It seems to me that there should be a relationship between system response time and sampling rate. What values can be obtained with the available ADCs?

What response time you're talking about?
Do you have specific requirement for the filter phase delay?

There is relationship between bandwidth and dynamic range. High speed ADC has wide bandwidth and it's dynamic range/bit resolution is specified for a full ADC bandwidth, which is a half of sampling frequency:

bandwidth = sample_frequency / 2

If you apply bandpass filter, you're cut off part of noise power and it leads to lower noise floor and dynamic range gain. This is known as processing gain:

processing_gain_db = 10 * log10( input_bandwidth / output_bandwidth )

for example, if you're using 125 MHz 16 bit ADC and digital filter to get 3 kHz output, you will get:

processing gain = 10 * log10( 125000 / 3 ) = 46.2 dB

processing gain = 10 * log10( 62500 / 3 ) = 43.2 dB


ADC has 125 MHz sample clock, so it has 125/2 = 62.5 MHz bandwidth. 
ADC has 16 bit, ideal 16 bit ADC has 16*6.02+1.76 = 98.08 dB dynamic range (real ADC has a little worse).

For 3 kHz output you will get about 98.08 + 43.2 = 141.3 dB dynamic range.

But note, your dynamic range increasing at the bottom due to noise power filtering.
The max ADC input power limit remains the same.

So it's hard to say if you can replace analog filter with digital processing, because it depends on the total power of unwanted carriers within 3...10 MHz bandwidth, which you want to cut off.

For example, if you're needs to get 3 kHz at 4 MHz and 3 kHz at 6 MHz, but there is very strong carrier at 5 MHz which leads to ADC overload, you will need to add attenuator to avoid ADC overload from 5 MHz carrier, but as a side effect such attenuator also will reduce dynamic range for 4 and 6 MHz carriers.

[radiolistener]

regarding to the phase delay, for FIR filter it depends on the tap count:

delay = (N – 1) / (2 * Fs)

where
N - tap count
Fs - sample rate

You can use these estimation functions to estimate required tap count for FIR filter:

- Bellanger: N = (2/3) * log10(1/(10 * δp * δs))*(1/trans)

- Fred Harris: N = -δ2 / (22 * trans)

- Kaiser: N = (-20 * log10(sqrt(δp * δs))-13)/(14.6*trans)

where:
δp = (10^(δ1/20)) - 1
δs = 10^(δ2/20)

trans = transition band = stopband - passband (relative to sample rate)
δ1 = ripple passband (in dB)
δ2 = the suppresion in the stopband (in dB)



As you can see, it depends on the stop band suppression and the filter slope sharpness.

I'm afraid that a 3kHz FIR bandpass with low pass-band ripple, 80dB stop-band attenuation and steep cut-off, running at a samping rate of >20 MSa/s (which is required for 10MHz - in practice rather more), may require a huge number of taps.

yeah, but it depends on how sharp slope is required.

[MikeP]

 I apologize, but I do not have all the information about the device, and I can not publish all the details. This is the very beginning of the project.

How many is "several"? Al least what magnitude? (7MHz/3kHz could be as many as > 2300)
What's the spacing between the (centers of the) bands? Are they equally spaced?
Do you need them all simutaneously, or does it suffice to tune-in one band at a time?...

The bands are located directly next to each other, sequentially, equally spaced and overlapping. The bands must be active at the same time. Everything else while I do not know.

We came up with a new type solution...

 Could you describe your idea in more detail.

What response time you're talking about?

  Response time is not just about filter delay. I meant the answer of the system - after the cascade with bandpass filters there is a cascade of threshold elements. I have no idea about the required delay yet.

[radiolistener]

The bands are located directly next to each other, sequentially, equally spaced and overlapping. The bands must be active at the same time.

Do you need BPF with bandpass from 3 MHz to 10 MHz?

Could you please show picture with frequency response of the filter which you want to achieve?
Because it's not clear what you want to get.

[MikeP]

 Radiolistener, thank you very much for the explanation and the math.

Do you need BPF with bandpass from 3 MHz to 10 MHz?

No, it is supposed to work in the specified range of 3-10 MHz. A filter with the specified squareness ratio has a bandwidth of 3kHz (-3dB) and 7.5kHz (-80dB).
 This is a rough calculation. At 180MS, 80dB rejection, 7000-7002kHz roll-off we have more than 1.4μs latency and about 500 taps for Fred Harris. Is that correct? How does the second slope of a bandpass filter affect?

[ejeffrey]

If you care about response time you want to look at minimum phase filters not linear phase.  They will have an asymmetric pulse response but be "faster".  You can make them with FIR or IIR topology but IIR will have many fewer coefficients at the expense of more suceptible to numerical precision and stability problems.  That said, any filter with such narrow bandwidth and steep cutoff is going to be relatively slow responding by nature and that includes the crystal filters.

Multiple narrow filters closely spaced is a good candidate for multirate filtering.  You use a coarse band select filter and decimate down to a lower sample rate and then implement your 3 kHz filters at the lower sample rate.  This is substantially more resource efficient than implementing a bunch of high order filters at the natural sample rate.  This is especially true for FIR filtering where you will need far fewer taps to implement the filter at the lower sample rate.  For IIR you will reduce the stability problems and require less numerical precision.

[MikeP]

 

  You use a coarse band select filter...

Thanks, that's a good idea.

 I don't see a single message about the impossibility of a digital solution. Thus, can we make a conclusion about the feasibility of a digital filter similar to a quartz filter? What differences can I expect?

[T3sl4co1l]

Quite feasible, just don't skimp on the processor.  An FPGA will do of course, or a DSP, or a regular MCU even, of adequate capability.  Probably a few hundred MHz clock (or say maybe double that, give or take how much assembler optimization you want to do, for a general-purpose CPU or MCU).

There are special comb and band-select filters that have especially good performance (light logic requirements, low propagation delay -- can run at high speeds, using few resources in FPGAs or ASICs), can read up on it specifically if interested.  (I don't have any refs offhand; I was looking at a paper earlier this year but alas I don't remember its title.)  And if nothing else, more traditional methods (filtering, conversion, decimation) will get you there, given a CPU fast enough.

Tim

[ejeffrey]

 

  You use a coarse band select filter...

Thanks, that's a good idea.

 I don't see a single message about the impossibility of a digital solution. Thus, can we make a conclusion about the feasibility of a digital filter similar to a quartz filter? What differences can I expect?

Definitely not impossible.  Anything you can do with an analog filter you can do with a digital filter and more.  Its generally more work but more flexible than just using off-the-shelf quartz filters.  Digital filters can also have much more ideal performance than analog filters and are not subject to component variations and insertion loss.

The biggest gotcha is linearity and dynamic range.  An analog filter, especially a passive one can have near perfect linearity over a huge power range.  This means it can reject huge out of band signals that would clip an ADC or require you to heavily attenuate the signal before digitization which can increase quantization noise.  It's a good practice to have an analog pre-filter before the ADC to avoid unnecessary loss of dynamic range.  Even weak non-linearities can cause distortion products that alias over your signal band and once they alias over your signal you can't really remove them with post-processing.

Also agree with Tim on not skimping on processing power, at least until you are more experienced.

[mawyatt]

We came up with a new type solution...

 Could you describe your idea in more detail.

It was new back in ~1980 and involved using a set of semiconductor ON/OFF switches arranged in a pair of commutators. The switches would sequence thru N states in a cyclic manner connecting an input to N series R and shunt C low pass filters connecting the commutators. The output commutator would sequence thru the N low pass filter outputs into a single output. The low pass filter gets translated up to the cyclic switching frequency, or Fclock/N where Fclock is 1/(ON period) of each switch. The original paper from ~1960s utilized a pair of car distributors for the two commutation switches.

Edit: The Q of this narrowband filter is very high and pi*R*C*Fclock I recall.

What we didn't realize until later was that by using only one commutator and selectively combining the N LP passive filtered outputs with proper weights, polarity and a shunt R, this becomes an amazingly good passive mixer & direct downconverter with direct I/Q outputs. This bi-phase passive PolyPhase Mixer is bi-directional in that it can translate a baseband impedance from the output to the input (backwards), and in this case place the  baseband filter function directly upon the antenna input port symmetrical about the LO. For ultra high dynamic range systems this is exactly what you want, whether working at 10Hz or 10GHz, impress the filter function on the input because the first encounter the input signal "sees" is a passive filter function, and in this case a very large passive integrator LP filter, which significantly relaxes the dynamic range burden with follow on stages. The bi-directional function also allows the creation of an input impedance as "seen" from the input (antenna port for example) that can be "tuned" with a simple baseband impedance and achieve R +-jX impedances without any inductors nor transmission lines, just simple Rs and Cs!!

Check the IEEE SSJ and CAS starting ~2009 for authors A Molnar and C Andrews from Cornell, these were the 1st public published works on this Polyphase Mixer, or N-Path Mixer. It quickly caught on around the world and just about every major research institute got involved, especially after the DARPA workshop. Believe some of the latest SDRs are utilizing this Polyphase mixer concept for narrow band use. Later this mixing concept led to a single chip solid state microwave duplexer which employed no transmission lines, or conventional filters, but utilized a "synthesized distributed effect" of the Polyphase mixer, also from Cornell.

Best,

[MikeP]

 Thanks everyone for your thoughts.

  I found a lot of publications about multiphase filter. This is a really popular thing. Unfortunately, such a design can only be implemented as an integrated circuit. All the examples found are exactly that.

  However, TI recently published this document. ADCs with digital filters are described here.

 https://www.ti.com/lit/an/slyt788/slyt788.pdf?utm_campaign=app-null-null-adj4Q20-adh-null-null-eu&utm_medium=email&utm_source=Eloqua&ts=1608022951209

 In the near future I will have an approximate characteristic of the required filtration. I will ask you to evaluate the possibility of implementing the entire complex on this ADC.

[mawyatt]

Mike,

The commutating filter I mentioned was done with discrete CMOS FETs and logic way back, we never did integrate that particular filter. The clock was generated by a programmable clock generator chip, although I can't remember the exact chip details. Today you could probably do this with readily available of-the-shelf chips to 100~200MHz I would think.

Edit: The PolyPhase Mixer I mentioned is a different circuit and not the popular PolyPhase Filter you often find in literature. The PolyPhase Mixer also could be implemented with discrete components and some off-the-shelve chips but all the research I'm aware of was done on full custom chips.

Best,

[cdev]

How does it compare to a Tayloe mixer? Which works quite well.

[mawyatt]

The Tayloe detector/mixer was the 1st utilization of the commutating filter principle from the 1960s paper for something other than a filter function I recall. Tayloe was granted a patent (6230000) in 2001 on the Tayloe Detector. This works very well as described as a clocked 4 phase IQ demodulator (intended purpose). However, the Tayloe Detector wasn't backed by a thorough analysis, and didn't address the multi-phase, noise figure, passive filtering, impedance transformation and other aspects of the Polyphase or N-Path Mixer including imposing the filter function at the input (antenna) port, so you might consider the Tayloe Detector as a predecessor to the Polyphase or N-Path Mixer.

The public IEEE papers by Molnar and Andrews in 2010 discuss these details and include a thorough theoretical analysis as required for IEEE publications. Their initial work was so involved it required two simultaneous papers (attached), one in the IEEE Solid State Journal and another in the IEEE Circuits And Systems and this only scratched the surface of this new and exciting circuit back in 2009. This work has spawned well over 100 additional papers on the subject and even included a best student paper at the ISSCC in ~2012 from USC (I briefly reviewed), which showed imposing a baseband complex bi-quadric function from the baseband up to the antenna port without any inductors. Some of our work which I can disclose involved doubling the baseband 3dB bandwidth while only imposing a ~0.1dB change in NF, yet keeping the input TOI above ~+30dBm.

There was and probably still are significant discussions (retired now so not in the "loop") on how this mixer achieves a NF that is better than theoretically possible for a Bi-Phase passive mixer which is 2/pi or 3.92dB Awhile back measured NF of below 2dB were reported and suspect much lower today, so how can this be possible

This created numerous discussions, often argumentative, amongst the highly respected gurus in this field. I remember giving an invited paper at the DARPA workshop called "Mixer First" back in ~2012 (this workshop was created specifically for the Polyphase or N-Path Mixer) and standing room only full of the worlds best gurus in this field.

After the presentation and asking for questions which were many, I got the "Can you explain WHY this mixer achieves a NF below what is thought to be a mathematical and theoretical limit?" from a highly respected guru in the front row ready to rip me to shreds (he was known for that!). My answer was the RF input waveform sequentially and in discrete steps dictated by the clock correlates with the mixer sampling clock/N which is the mixer LO frequency. This correlation allows the RF waveform to discretely build-up charge on the sampling LP filter capacitors and thus invokes a memory effect which tends to average out for random noise or out-of-band signals but correlates for the RF signal of interest (a bleed resistor discharges the capacitor and helps form the BP effect as seen from the antenna port). As the RF signal gets closer to the LO frequency this correlation becomes stronger and at identically the LO frequency becomes the Auto-Correlation Function. This discussion took 5~10 minutes and eventually was agreed as an acceptable reasoning, and I was off the hook

Here's some old images of the original Cornell Polyphase Mixer based receiver in 65nm CMOS.

Anyway this is an amazing mixer that is coming into public use, believe in a few SDRs available now.

Best,

[mawyatt]

This type of signal processing we called Discrete Time Continuous Amplitude (DTCA) which dates back to our work in the early 80s where we developed a different type real time spectrum analyzer based upon the Chirp Z Transform rather than the usual FFT. This device had complex convolvers designed with a custom CMOS process using CCD techniques for the mathematical convolution, and a 4 quadrant multiplying DAC where the RF signal is the reference and the digital data is the Sine and Cosine Chirp coefficients for the Chirp multiplication, so the algorithm operated with a clock (discrete time) and continuous RF amplitude. Much more signal processing was going on as the CCD convolvers had "tunable" coefficients (as did the DAC Chirp multiplier) which allowed dynamic alterable configurations, this created a kind of unique spectrum analyzer which was dynamically configured on-the-fly to capture & analyze specific type waveforms.

One basic advantage of DTCA techniques is the dynamic range isn't limited by the high speed ADC required in conventional digital signal processing, another is the significantly lower power consumption. As CMOS digital feature sizes shrunk and more DSP & FPGA engines became available, DTCA faded until the Polyphase (N-Path) Mixer resurrected it.

Best, 

Edit: Thinking that maybe starting another thread on Mixers and not deviate this Filter thread if folks are interested.

[MikeP]

 First of all, I would like to express my appreciation and gratitude to Mike-mawyatt. He was of great help in understanding the commutating filter.

 I don’t want to make a final conclusion, but a comm filter can be an alternative to crystal filters in some conditions.

 I am attaching several documents to this post. Also here is a 10-stage filter model.

 Correction: I can't add a model !? Everything is quite simple there, you can understand from the picture.

[MikeP]

 Now for the practical implementation. I have a desire to experiment and make a working model. Low frequencies (50kHz-LO) were used in the simulation, the 4016 switch works well here, but it is bad for the required range.

  What can be used as a switch to generate 20-10 ns samples? This is not a trivial question, since the quality of this switch determines the filter's performance. Thanks.

[ejeffrey]

I don’t want to make a final conclusion, but a comm filter can be an alternative to crystal filters in some conditions.

 I am attaching several documents to this post. Also here is a 10-stage filter model.

Various forms of switched capacitor and discrete time analog filters were popular in the 80s and 90s where they had a lot of advantages: it was easier to achieve higher Q and higher order than a passive analog filter and could operate at higher frequencies than an opamp based active filter.  You could implement transfer functions that were otherwise difficult -- a bucket brigade circuit can implement an FIR for e.g., echo cancellation. They also had the nice behavior that you could change the behavior by changing the clock frequency -- compare this to a crystal filter which is fixed by manufacturing, or analog filters where you would need to use variable capacitors or resistors.

These days digital signal processing has gotten so powerful and so cheap that the applications where these filters make sense are getting rather rare.  If a fixed analog filter or crystal filter is good enough use it, otherwise it is usually most cost effective and the best performance to digitize the signal and use DSP.

That said, they are really cool so if you are doing this for fun by all means go ahead. 

[mawyatt]

Now for the practical implementation. I have a desire to experiment and make a working model. Low frequencies (50kHz-LO) were used in the simulation, the 4016 switch works well here, but it is bad for the required range.

  What can be used as a switch to generate 20-10 ns samples? This is not a trivial question, since the quality of this switch determines the filter's performance. Thanks.

The best performance for these types of commutating filters is not a conventional analog switch like 4016 or higher speed variants. We found long ago and other researchers confirmed, that symmetrical switches are not as good as a simple large NMOS device for a given area and driving capacitance. Odd order non-linearity is the limiting factor, 3rd being the worst. Try and find a good high speed NMOS device for your filter, that will give you the best results.

Best,

Mike

[MikeP]

 ejeffrey, thanks for the comment. It's actually interesting, but much more scary.

 Regarding the low cost of the digital solution. ADCs capable of handling 10 MHz with 16 bit precision are very expensive - hundreds of dollars. And I need several of these.
 DSP or FPGA capable of handling such a flow cost even more. Clock and power... Then the diamond people will get down to business. I've seen projects that are five years long, without a final.

 As long as I have hope for my own strength, I will go all the way.

 Mike, thanks. I studied Texas, now I am studying Analog. There is no answer yet. Probably your option will be the only one.