I'll also be referring to that other post at times.
The output FET's are source followers, so having +/-40V on the gates is not a problem as long as the source is able to follow, this is what happens all the time when you play music at full power.
What you do want to worry about is the differential voltage between gates as too much differential means both sides are conducting too much, current, heat... destruction.
Where you do have a problem though is if your gate voltages settle at the shown voltages when idle, this means a lot of DC on the outputs and you shouldn't connect a load until you have solved this.
You have double checked FET drains are insulated from the heatsink?
I'm not sure adding a 1k resistor to the sources is the best way to troubleshoot. I'd go for an adequate lab supply if you have one that can output +/-45V or inserting a 12V 20W bulb on each rail before the output transistor drains. (Edit: this may be a little optimistic, maybe higher voltage & power bulbs is safer.)
Turn the idle current trimpots right down towards R505, R506, if layout is as on schematic.
I'd be checking on: Q555, Q557, Q559, Q573, D551, (open D501), R501, R563, R567, R569, trimpot (never ever neglect the trimpot in the bias circuit...), gate resistors.