Cascode SiC and GaN FETs

[Slh]

Has anyone else been enjoying using these devices? Eg cascode SiC JFETs from Qorvo or GaN HEMTs from Transphorm? They're just so easy to use! True they switch ridiculously fast but a little snubbing and gate resistor tuning helps sort that out. Standard silicon gates, low input capacitance etc. Just hook them up to a standard silicon gate driver (assuming the CMTI is acceptable - probably need 100kV/ns if isolated/high side) and away you go!

You don't need a negative gate supply, gate voltage between 10V and 20V, low drive currents. Easy to bootstrap or use with standard current mode pwm controllers.

Just got my first successful GaN project running, a 45W peak mains to 500V flyback. Flyback circuit from scratch, hand wound transformer and basic ucc3842 controller. Worked perfectly first time. Control needs a little tuning but no issues with the switch. I still need to finish off the case so I can put the lid on and get rid of the dodgy crocodile clips...

[Phil1977]

Congratulations to that design and that it´s working from the start - that´s great!

Anyhow, one working example is not a fact you can recommend a power transistor on.

Don't get me wrong, it´s really a nice build with lots of filtering and seemingly good layout, but a good advertisement for a certain brand of chip should include:

- Efficiency of the converter
- Efficiency of the same converter with a standard-HV-FET
- Some reliability tests
- EMI tests
- Temperature range

[Slh]

Agree totally that the design alone isn't enough to recommend to someone that they should use them but compared to either SiC MOSFETs or enhancement mode GaN HEMTs they're just so easy to use to get something to work.

I've used the cascode JFETs more on other projects and on a couple of them they replaced a standard 1700V SiC MOSFET with better efficiency, more reliability and better high temperature performance . The wide gate supply range really helped us.

I'm really interested in whether other people have been using them and what issues they've had - the super fast switching is a concern as it is hard to slow them down - harder than standard SiC.

The GaN devices don't have an avalanche rating but that's standard for GaN I believe.

[Slh]

Also, from a cost point of view the GaN fet was not the right answer, I just wanted to see if I could get it to work (and put a footprint that supports silicon just in case)

[jbb]

On the cost front… it’s complicated. You’ll likely pay more for a GaN or SiC device than a Si one. The trick is to save money elsewhere in the design. For example, increasing the switching frequency can reduce the size and cost of inductors, transformers and capacitors. Alternatively, replacing a Si diode (eg in a boost-type power factor correction circuit) with a SiC Schottky diode can get rid of reverse recovery effects and reduce the size of the EMC filter.

[nimish]

Cascode gan is a waste of time. You don't get the benefits of zero qrr or the low voltage gate drive so switching losses are high at interesting frequencies (~1MHz) and dead times are still long.

Maybe made sense before dedicated gan drivers and integrated gan from navitas, ti, st came along but nowadays unless you have something interesting like transphorms hv 1200V gan cascode is IMO pointless

You're paying for the expensive gan transistor so unless you are getting the HF envelope pushing features with better control just get a lower rdson sj fet and save your $.

Having to slow down slew rates is a consequence of bad pcb layout and/or bad control. At high voltages ZVS is essential. You can't just drop GaN in without a real effort to use it well.

[T3sl4co1l]

There's also a sneaky path: the internal floating node voltage goes up and down, not quite in phase with the drain proper; the effect is, there's a burst of hysteresis loss when going through low Vds, where the top transistor is saturated and the bottom one is still pulling down (or letting go).  This has a similar effect to SuperJunction hysteresis losses; it's a bit lower magnitude in typical cascodes, but nowhere near the level in planar devices (ancient Si*, current SiC, most HV GaN).

*Planar Si have low output losses, but you make up for it in the several watts gate drive required to run a big enough device, fast enough to matter. Not to mention the cost of said device. So, uh yeah, this wasn't ever really relevant prior to SJ, not to mention the widespread adoption of resonant topologies.

GaN also have the concern that the channel to substrate loop can absorb some induced field, and this dominates the hysteresis losses.  That is, the substrate isn't usually connected (or strongly connected) to the transistor, there's a buffer layer between GaN-stuff and the Si wafer.  Either way, there's capacitance from channel to substrate, then resistance through it.

Mind, these loss effects are far smaller than those due to hard switching, or poorly timed switching in general -- it's mainly only noticeable in resonant designs.  And GaN losses are noticeable in the several to 10s MHz range, so you'll be running quite fast to have that as a dominant problem.

That said; if you want to explore resonant, you could probably hack the '3842 to run QR flyback.  Not sure there's any example circuits out there, and, there are proper QR mode controllers that could replace it, but, some clever manipulation of the RtCt pin / network, in relation to the aux winding's AC voltage, could be relevant here.

Tim