The input amplifier U1 couldn't be decoupled at the supply pins
C1 doesn't have to be there at all. It shouldn't oscillate without C1, and anyways, those are not power pins any more. Those pins are now part of the active circuit, and is essential that no other circuit branching can steer away any current from those former power pins. All the current has to go to the R4/R5, in the external mirrors.
The new power pins are the terminals of the R4/R5/1k at the high voltage. Decoupling "near pins" has to be done now between the HV pins of those resistor and GND, at the node between R4-V4 and GND, and the other one between R5-V5 node and GND. When a symmetric supply is used, two decoupling are needed, one for each supply.
Another thing, on my LTspice simulation hangs at 100% without going to the next steps, so I had to add in the schematic an ".options srcsteps=0". The minus of V4 would be better to be tied at GND, same the plus of V5. In simulation it doesn't matter, but the physical circuit will be better with V4 and V5 tied to the ground, and not in series with V1 and V2.
Using the TIA as a current sense and negative feedback to a HV Amplifier to make the HV Amp "look" like a HV current source.
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![](https://www.eevblog.com/forum/projects/dso-awg-based-curve-tracer/?action=dlattach;attach=1605427;image)
Yes, indeed, thank you!
I did try to do that yesterday and failed, it was oscillating all the ways.
![Grin ;D](https://www.eevblog.com/forum/Smileys/default/grin.gif)
My try was with 2 opamps, and instead of U3 I've tried to sum the TIA output voltage directly to the U1. Should have worked, but it didn't.
![Confused :-//](https://www.eevblog.com/forum/Smileys/default/confused0024.gif)
I have a serious lack of skills when it comes to loops stability.
Then I have to leave it, and today spent some time with the moffy's version of buffer, trying to modify it from a Voltage-Controlled Current-Source (VCCS) into a Voltage-Controlled Voltage-Source. I was hoping to do that by using current-feedback (CF), so to keep it fast (as an AWG buffer)
With CF the results were not very good. It was stable, but the Vout didn't follow Vin very well with low impedance loads. With 100+ ohms it was OK. For some reason I couldn't reduce enough the output impedance. I have to understand CF better before fiddling again with it.
The moffy's schematic resembles very well the topology of a CF amplifier (I know them as Norton opamps, not sure if this name is widespread), like shown in Fig.5b here:
https://archive.org/details/edn-1989_01_05/page/164/ except moffy's doesn't have the second voltage follower at the output.
For a VCCS the output voltage follower is not needed, but to make it VCVS I had to add a voltage follower. It's enough to buffer the voltage for the feedback network only, so a low power opamp should be enough (the very same opamp that measures/display the Vout on the R_load). However, to make the VCVS immune to load variations I had to drop the CF idea.
![Undecided :-\](https://www.eevblog.com/forum/Smileys/default/undecided.gif)
![](https://www.eevblog.com/forum/projects/dso-awg-based-curve-tracer/?action=dlattach;attach=1606267;image)
The schematic is drawn with the switch in CV mode. Notice that for the CC mode, there is no global feedback from load to input, and also no current measurement in the load!
![Shocked :o](https://www.eevblog.com/forum/Smileys/default/shocked.gif)
Hope I'm not wrong with this one, but I think there is no need to have a global feedback in for CC mode, because of the Kirchhoff law in the node "out", and in the node-opamp "U1".
The two current mirrors have their own local feedback loop. The current-mirrors driven by the hanging rail-to-rail opamps in the moffy's initial schematic (instead of a classic transistors pair mirror) also solve the thermal runaway, and make it easy to set the idle current in the power transistors.
Another advantage would be that nothing swings in high voltage, except the "out" node. And all is current controlled, which means induced noise and Miller or the stray capacitance's bad influence are kept to a minimum.
Or at least that's how I believe it is (please correct me if wrong).
If it will work in practice as well as in simulation, then two buffers like those can make a dual channel SMU like you said, one with HV and lower max currents, the other with lower voltage and high I, and bot can be tied to ground to know Ib and Ic .
OTOH, would be a pity to not use a ready made HV opamp like that APEX.
![DMM :-DMM](https://www.eevblog.com/forum/Smileys/default/smiliey_dmm.gif)