LLC getting started

[Martinn]

Recently I came across LLC converters, which I have avoided so far. I am somewhat comfortable with classic topologies and magnetics calculation (not on a production level though) and thought finally trying LLC might be fun!
There are many good tutorials on LLC design (I liked that one https://www.youtube.com/watch?v=lgmqviNBcWQ&ab_channel=Dr.RayRidley), so next step would be to actually build one. I have a four channel MSO and two current probes, so observing real life ZVS/ZCS should be possible!

So my question: What would be a good controller chip for experimenting? Most examples and eval boards are like 600 W offline, but in order not to have lethal voltages on the bench, I'd try something like 24 V in, 12 V out with < 100 W so a regular bench supply/electronic load can handle that.
TI has a handful of chips with simulation support, but most seem more intended for the 1 kW offline case.

Recommendations?

[T3sl4co1l]

I thought this one was pretty easy to understand,
https://www.st.com/resource/en/datasheet/l6599a.pdf

Simple enough I made my own version of the scheme, which you can take as a bare-bones implementation for example.
https://www.seventransistorlabs.com/Images/ResonantSupplySch.png
Pushing some MHz in it was hilariously tryhard, it dissipated almost as much gate drive power as conduction loss(!), but easy fix.  The core handles much more flux than I thought it did initially.

Note that C23 must be PP or PPS film, or C0G ceramic.  Hmm, I didn't write the turns ratios or other values on there.  Well, consider that an exercise for the student.

Other controllers are much more complex, with startup, run and multiple protection modes; dead time control (either sensing output slew rate, or inferring it from load current, something like that); pin-reduction schemes like obtaining startup and timing references from pins also used for soft-start or monitoring; feedback or compensation using currents rather than voltages; etc.  (Not so unusual, gm error amps are fairly common these days; but stuff like cascode inputs, while they do offer excellent performance, they're a bit inscrutable when it comes to probing the loop.)  I certainly wouldn't recommend trying to implement (or start with) one of those; they're rarely documented well enough to figure out anyway, and you can basically only use them as a black box element, either it works or it doesn't.

Resonant tends to be used at high voltages, where Eoss starts to dominate.  Although with modern transistors, that's really not such a big deal anymore, with pulse type converters still being attractive.  Or, put another way: resonant isn't quite as beneficial as you'd think.  It certainly helps, but it doesn't actually eliminate switching loss.

Tim

[moffy]

I thought this one was pretty easy to understand,
https://www.st.com/resource/en/datasheet/l6599a.pdf

Simple enough I made my own version of the scheme, which you can take as a bare-bones implementation for example.
https://www.seventransistorlabs.com/Images/ResonantSupplySch.png
Pushing some MHz in it was hilariously tryhard, it dissipated almost as much gate drive power as conduction loss(!), but easy fix.  The core handles much more flux than I thought it did initially.

Note that C23 must be PP or PPS film, or C0G ceramic.  Hmm, I didn't write the turns ratios or other values on there.  Well, consider that an exercise for the student.

Other controllers are much more complex, with startup, run and multiple protection modes; dead time control (either sensing output slew rate, or inferring it from load current, something like that); pin-reduction schemes like obtaining startup and timing references from pins also used for soft-start or monitoring; feedback or compensation using currents rather than voltages; etc.  (Not so unusual, gm error amps are fairly common these days; but stuff like cascode inputs, while they do offer excellent performance, they're a bit inscrutable when it comes to probing the loop.)  I certainly wouldn't recommend trying to implement (or start with) one of those; they're rarely documented well enough to figure out anyway, and you can basically only use them as a black box element, either it works or it doesn't.

Resonant tends to be used at high voltages, where Eoss starts to dominate.  Although with modern transistors, that's really not such a big deal anymore, with pulse type converters still being attractive.  Or, put another way: resonant isn't quite as beneficial as you'd think.  It certainly helps, but it doesn't actually eliminate switching loss.

Tim

Very neat and clean circuit, thanks for sharing, I don't know a lot about LLC supplies. From what I can see, the dual current mirrors/sources, Q7 and Q9 feed a variable current, controlled by the supplies feedback, and this current flowing into C19 is switched by the comparator IC4A and the diode bridge, creating a triangle wave across C19 and the clock signal into IC3. Do you think that LLC supplies would make a good low noise supply? Interested in your opinion.

[T3sl4co1l]

Correct.  I like such circuits as a sort of minimal mix between discrete analog and "gate level" or "RTL" schematics, i.e. ICs are allowed but only limited types: here comparators and drivers, and op-amps but I didn't need any.  (Hm. Q10A could be a ref + error amp, but the Vbe is sufficient accuracy for purpose, so consider that an already-simplified op-amp.)  As an illustration of systems, the reader should be familiar with basic analog blocks -- voltage dividers, capacitors for ramping and with inductors for resonance, current mirrors and sources, diode gates, transistor switches and common-emitter amplifiers.

Basic operation is the FRQ node is control state.  R57 normally pulls it up, reducing frequency (implied: towards resonance, increasing power output); Q10A for current limit, and opto for voltage regulation, pull down on this node, raising frequency.  To avoid arbitrarily high frequency operation, IC4B disables the output, with Q10B hysteresis, to implement burst mode.  (This happens asynchronously, but there's nothing wrong with switching on or off in the middle of a pulse.  Resuming is always going to be a hard-switching event, increasing switching loss if it happens frequently enough; and EN toggle rate isn't limited, by IC4B in and of itself.  The feedback elements don't act fast enough though, instead having an integrator effect (C20 explicitly, or IC5 partly with C25 but also phototransistors are just slow as molasses).

Low noise, is relative.  If you've designed it such that it's in CCM* (not bursting), it has whatever ripple you expect from it, and that's about it.  If it's in burst mode, it's basically any hysteretic converter, with extra steps.  (It might not actually be that bad, and you only get the hard-switching EMI on burst start, but you also get free ringdown on burst end, which can be quite chirped due to the steep C(V) curves on modern transistors, and maybe that's an EMI contributor too.)

*We can define CCM a little differently but analogous to the traditional meaning.  If inductor current is continuous -- not going to zero on an edge, and not being turned off (staying out of burst mode) -- then it must be in ZVS, or, has the potential to anyway (since that depends on dead time being long enough, and maybe current during the switching edge is low sometimes, giving a partial hard switching edge with a fixed dead time driver like this).  This basically means always switching, and frequency above resonance, so that inverter current has an inductive phase.

Tim

[moffy]

Correct.  I like such circuits as a sort of minimal mix between discrete analog and "gate level" or "RTL" schematics, i.e. ICs are allowed but only limited types: here comparators and drivers, and op-amps but I didn't need any.  (Hm. Q10A could be a ref + error amp, but the Vbe is sufficient accuracy for purpose, so consider that an already-simplified op-amp.)  As an illustration of systems, the reader should be familiar with basic analog blocks -- voltage dividers, capacitors for ramping and with inductors for resonance, current mirrors and sources, diode gates, transistor switches and common-emitter amplifiers.

Basic operation is the FRQ node is control state.  R57 normally pulls it up, reducing frequency (implied: towards resonance, increasing power output); Q10A for current limit, and opto for voltage regulation, pull down on this node, raising frequency.  To avoid arbitrarily high frequency operation, IC4B disables the output, with Q10B hysteresis, to implement burst mode.  (This happens asynchronously, but there's nothing wrong with switching on or off in the middle of a pulse.  Resuming is always going to be a hard-switching event, increasing switching loss if it happens frequently enough; and EN toggle rate isn't limited, by IC4B in and of itself.  The feedback elements don't act fast enough though, instead having an integrator effect (C20 explicitly, or IC5 partly with C25 but also phototransistors are just slow as molasses).

Low noise, is relative.  If you've designed it such that it's in CCM* (not bursting), it has whatever ripple you expect from it, and that's about it.  If it's in burst mode, it's basically any hysteretic converter, with extra steps.  (It might not actually be that bad, and you only get the hard-switching EMI on burst start, but you also get free ringdown on burst end, which can be quite chirped due to the steep C(V) curves on modern transistors, and maybe that's an EMI contributor too.)

*We can define CCM a little differently but analogous to the traditional meaning.  If inductor current is continuous -- not going to zero on an edge, and not being turned off (staying out of burst mode) -- then it must be in ZVS, or, has the potential to anyway (since that depends on dead time being long enough, and maybe current during the switching edge is low sometimes, giving a partial hard switching edge with a fixed dead time driver like this).  This basically means always switching, and frequency above resonance, so that inverter current has an inductive phase.

Tim

Wow, there is a lot going on in that circuit, very well thought out. It took me a moment to see how C22, the diodes and Q10A were monitoring current, but of course over a limited frequency range the voltage across C23 is related to its current, very clever. Did you ever have an issue with asymmetry of the triangle wave due to the imperfect match between Q9a and Q9b? I know they are in the same package but the data sheet I saw doesn't seem to have any matching figures. Or is a small asymmetry not an issue? Thanks for the detailed explanation, especially the burst mode operation.

[T3sl4co1l]

Any frequency range, actually. Think about it.

Also just to reiterate -- C23 is the resonant cap, low loss C0G. That fact should make the rest of this fairly (somewhat? possibly?) obvious.

It's a bit hokey at this low voltage, as the diode drop is relatively significant in comparison to V(C22), but that goes away at higher voltages of course.

So it's a nice for-free current sense.  You'd use a voltage divider to sense voltage, why not a current divider to sense current, eh?

I don't recall what PWM was, but a modest error is fine as the output is capacitor coupled and harmonics don't matter.  Currents and voltages are small, so temperature imbalance is small and matching is good; you can even get matched pairs for ~1% error in this configuration.  (I would expect more like 20% worst case for random unmatched types.)   (Is the -BD version unmatched? I don't remember.)

(Monolithic pairs are almost entirely extinct; any random dual that doesn't cost $10 is absolutely two separate dies.  Thermal matching in a SOT-23-6 or etc. is quite poor, just plastic between them -- no overlapping leadframes or anything.  Differential Rth of 300-600 C/W is typical IIRC.  So it doesn't take many mW to get a noticeable imbalance.  Cascode service (e.g. Wilson current mirror) is recommended in the matched-die type datasheets, for this reason.)

Tim

[moffy]

I now get the voltage divider analogy, cleverer than I thought. Thanks Tim for the clear explanation.

[Martinn]

Simple enough I made my own version of the scheme, which you can take as a bare-bones implementation for example.

Thanks for sharing, very informative!
As I understand it, you feed the gate driver with a variable frequency signal, using the fixed 14 ns dead time of the driver. Would not a longer dead time be necessary to achieve ZVS, bringing the switch node up to top rail level on the L->H transition?
Would an LLC configuration require L1 to be populated?
So essentially your design is a discrete VCO with frequency being determined by the current sense and voltage feedback via optocoupler, with the added burst mode for low load?

Thinking about it, first step could be setting up the power stage with a half bridge driver (with variable dead time if possible) and driving it with a function generator. Together with a lab supply and either power resistor or electronic load one could observe the waveforms and test out different steady state scenarios (and compare them with simulation) without having to worry about all startup, burst mode, control loop and protection functions.

One reason looking for LLC is trying to find a low CM injection and low noise isolated DC/DC converter for precicion circuits (like for powering a floating LTZ1000 reference or a 18 bit precision voltage source), like the DMM7510 coax transformer or the pickering patent transformer. Flyback in these situations is not ideal; high peak currents, asymmetric drive, primary ringing... the UCC25800 https://www.ti.com/product/UCC25800-Q1 is a nice possibility (although intended as gate drive supply). An interesting property of LLC is that it actually benefits from poor coupling: While the extra leakage would cause excessive snubber power loss in a flyback, for an LLC it is actually required for building the resonant circuit. Associated with the loose coupling is the lower capacitance, if you look at this lineup of transformers
https://www.we-online.com/en/components/products/WE-AGDT_GATE_DRIVE
the 750319177 has just 0.68 pF, while other variants intended for flybacks have a much higher coupling.

Not sure how well resonant mode would work for a scope clock supply (12 V -> 250 V, up to 1.25 kV via multiplier cascade). In CRT TVs, horizontal deflection and HV generation ("flyback") was combined in a resonant configuration, though mainly to recover the energy stored in the horizontal deflection coil.

[T3sl4co1l]

Ah, one quirk about the design, L1 was a planar inductor -- it's non-pop because it literally isn't a component.  It was some 100s nH I think?  The jumper likewise was there to bypass it and place my own external one, in case needed (or to try).

What difference is dead time for L-H as opposed to H-L?

At the high switching frequency / low inductances, 14ns was more than enough dead time; I forget what the actual waveforms showed.  That would be something to adjust if going to lower frequencies of course.  Drivers with various fixed amounts, or variable, are available.

Indeed, setting up an open loop test is a start; just beware of drawing excess current around resonance.  A relatively small supply bypass capacitor (so it discharges quickly under dangerous conditions) plus a current limited supply would be a good idea.  (Mind the output capacitance of typical bench supplies, by the way; you may want to use an external resistor for that limiting.)

Draw out the node equations and solve for current and impedance; get a feel for how the network responds, and how to choose components.  Generally Lm/Lr ~ 5-10, but smaller values can be used, particularly if a wide input/output voltage range is needed.  Zo varies from sqrt(Lm/Cr) to sqrt(Lr/Cr) (and similarly for Fo) depending on load resistance, so you need to choose Zo (and Q) adequate to deliver required output voltage and current (power).


Resonant works well for high voltages, though you may want to alter the network so as to load the output with capacitance rather than inductance -- this accounts for the mismatch between winding Zo (the winding is layers of wire, it can't be much more than a few hundred ohms) and load resistance (easily 10s kohms for even fairly modest HVs of low ~kV).  Thus the transformer bandwidth is quite low (<10%, maybe?) and pulsed operation is infeasible, but class E (CRT flyback) and (full wave) resonant (your classic "ZVS HV driver") are perfectly doable.

Which, let's see.  The direct L-C complement of the LLC, the CCL, would be...
Inverter: voltage sourcing <--> current sourcing
series inductor Ls <--> shunt capacitor Cs
series capacitor Cr <--> shunt inductor Lr
shunt magnetizing Lm <--> series Cm*
shunt load RL <--> series load RL

*But it's not 'm'agnetic at all.  "Electrotizing" C_E..??!

Okay, so that doesn't work -- load is in series with capacitor, not parallel.  It would kinda work for some loads -- indeed, CCFL drivers use a parallel-resonant tank with a series cap to the load.  The high voltage on said tank however is generated differently...

If we just straight up complement L and C, we basically swap the role of Ls and Cr so that's trivial, but Lm becomes Cm in parallel with the load resistance -- there we go.  But, we don't have any place for transformer inductance; so it better be a good transformer (in the sense of contrasting with a "coupled inductor"!).

The other usual approach is another kind of LLC,



often called series-fed parallel-resonant.  This works similar to LLC, but I think, is more common for higher Q factors?  Note that the C can be decomposed into series and parallel resonant halves, and thus Lm + Cseries acts as an L-match network from Vin to Vo.  So we can use standard RF design equations to work with it.  And, indeed we can obtain Lm from leakage inductance.

And, as mentioned, HV transformers are often narrow band i.e. highish Q, so this works out nicely.

Power control can be frequency modulation as above, just beware the step response varies with the difference between Fdriven and Fo -- that can be quite nasty for a control loop.  Consider this FSK response:



The same is true for a basic series resonant network as well.  I've used both series-fed and series resonant for induction heating purposes, which was the context of this particular waveform.

At high enough voltages, eventually it approaches a Tesla coil, but we might not drive it that way -- either because that assumes double tuning, or pulsed operation (both as in the spark type TC).  Though to be fair, since the resonant current is necessarily quite high to develop high voltages -- we might not mind using pulsed operation, if the output doesn't need much current.  That said, again because of bandwidth limitations, pulsed operation may not save us much: it takes a long time for the output to ramp up and down, and we might be better off just using better materials (litz windings where applicable, better ferrite cores, etc.) and CW operation instead.  (Note that, since secondary capacitance is dominant at very high voltages, its insulation also needs to be high quality, to give high Q factor.  That may mean avoiding polyester tape; probably something like, oh I don't know, oil-impregnated polypropylene paper would be best..?  Oil immersion would be necessary anyway if we're talking like 100s kV for x-ray, SEM, etc. applications.)

Tim