I can think of several reasons why this is a bad idea to begin with, and a few more reasons why it's simply, unconditionally, worse (in performance) than an alternative arrangement of the same parts, give or take...
Tim
I'm not suggesting to build that circuit, but to use that in simulations to see how an SCR-like circuit works.
BTW the mosfet doesn't suffer any stress at all. Its losses are just 3-5W, because, thanks to the inductor, there is not much current on switching on, and no current on switching off as the half sine wave is already below the capacitor voltage.
xavier60, you are right about the gate drive at low output voltage.
BTW I added D11 because the path from the levelling capacitor to ground, through the PMOS body diode, prevented the circuit to work in the first tests I ran.
It should work better with NMOS switch and control circuit bootstrapped by the positive output voltage.
A differential amplifier connected to Vpre-reg,Vout, with a much lower RC constant and with a reference changing according to the output voltage would also help to deal with large variations of that (output voltage), load and transient loads.
In simulations of a different circuit of this kind, I made last year, I found that a large capacitor, resonating at about AC-line frequency with the input inductor, had a huge impact on efficiency, bringing it almost at the level of switching pre-regulators.
If I get enough spare time, I'll try to find (or re-draw) it, in the next few days.
BTW the other kind of pre-regulator, that one that switches-off at a given output voltage threshold, has a really poor efficiency at low output voltage.