Very low bias current Op-amp to buffer a Kelvin Varley divider

[splin]

I thought this interesting question didn't get much response over on the Test equipment forum so I thought I'd put a link here where it might reach a wider audience:

https://www.eevblog.com/forum/testgear/buffer-for-kelvin-varley-divider/

The original poster was looking for a very low input bias (preferably < 1pA) op-amp with very low drift, to buffer a KVD with 70k o/p resistance, whilst not compromising the .1ppm linearity spec of the KVD significantly. Jim Williams published an app note covering this exact application, where the errors due to the amps CMRR and finite gain are also pointed out (140dB CMRR equates to .1ppm of linearity error in a voltage follower configuration). That was in 1999 so perhaps there are some better parts available now?

Can anyone recommend a better op-amp than the LTC1052 or LTC1152 for a one-off piece of test equipment where selection is possible to a limited extent - for cheaper devices at any rate.

I'm also interested if anyone has any suggestions to my question as to why Jim Williams chose to use the LTC1152, which seems to have better specs, rather than the LTC1052 - see reply #11.

[Kleinstein]

The LTC1052 uses external caps and has higher bias currents.

More modern AZ Ops would be something like AD8551 or LTC2057. In general the lower noise ones have higher bias currents and often also a higher offset. However Bias currents are relatively stable, and little dependent on temperature (unless very high). For ultimate performance some kind of bootstrapping may be useful, as the bias can depend on common mode voltage, so that input resistance is not as high as one might expect for a CMOS chip.

Finding something in the 1 pA range is hard (maybe selected LTC1050 / ICL7650), and will be a rather high noise, but low offset version.

[splin]

The LTC1052 uses external caps and has higher bias currents.

My datasheets show that the LTC1052 has lower bias current - 1pA typ @25C, 30pA max compared to 10pA typ, 100pA max

More modern AZ Ops would be something like AD8551 or LTC2057. In general the lower noise ones have higher bias currents and often also a higher offset. However Bias currents are relatively stable, and little dependent on temperature (unless very high). For ultimate performance some kind of bootstrapping may be useful, as the bias can depend on common mode voltage, so that input resistance is not as high as one might expect for a CMOS chip.

The LTC2057's could be a good candidate but the bias current is a bit high at 30pA typ @25C, 300pA max. How practical is it to trim it out? It will change as the common mode voltage changes so bootstrapping would help a lot in this respect.

When you say bootstrapping do you mean servoing the supply rails to keep the common mode voltage constant to remove the finite gain (Avol) and CMRR error contributions? What are the disadvantages of doing this - presumably the bootstrap amplifier's noise gets added directly?

Finding something in the 1 pA range is hard (maybe selected LTC1050 / ICL7650), and will be a rather high noise, but low offset version.

The LTC1052C has better specs than the LTC1050 except for Avol, particularly Ib typ of 1pA v 10pA. Any particular reason you suggested the 1050? Of course typical is not guaranteed and both have the same 30pA max spec @ 25C. It may not be possible to find any of those 1pA devices for a reasonable expenditure as they aren't especially cheap parts.

[Kleinstein]

With bootstrapping the OP I meant adjusting the supply to keep common mode voltage constant.
The main disadvantages are the extra effort and the need for extra protection circuit. The protection leads to some extra leakage, but may be needed anyway. There is essentially no extra noise or drift, as the AZ OP is still doing the final amplification and will attenuate noise / drift from the bootstrapping circuit to a large extend (e.g. by common mode rejection or loop gain).

One advantage is, that the AZ-OP does not need to be made for the high supply voltage. The choice for AZ OPs at 5 V supply is much larger than at 20-30 V. Also bias may be lower at low supply voltage. The second advantage is, that CM voltage may be chosen for minimal bias.
I have not seen directly analog compensating for the bias, but it does not look impossibly. The classical solution with same impedance at both inputs however does not work, as the sign is different. Even with a 100 M resistor 10 pA of bias would only be 1 mV of voltage. So a rather higher resistor may be needed.

[splin]

I have not seen directly analog compensating for the bias, but it does not look impossibly.

It seems now you do :

http://electronicdesign.com/analog/single-supply-op-amp-input-bias-current-cancellation

You have to wonder if the author actually built that circuit and tested it or just did a theoretical design. I wonder how stable it is and how low you can reliably cancel the input bias current?

I see that Linear's LT1013 datasheet includes a 'Triple Op Amp Instrumentation Amplifier with Bias Current Cancellation' circuit on page 18 with the claim of typical input bias current < 1nA (compared to the typical Ib value of 12nA). Not sure how well such schemes would work with a FET/CMOS amp needed for a KVD buffer though.

The alternative to trimming out Ibias is to use a non-autozero op-amp with Ib < 1pA and periodically trim out the offset voltage, which is relatively easy to do by shorting the input, especially if the buffer is already driving a suitable meter/ADC. CMOS amps tend to be a bit noisy, but the OPA140 might be a reasonable choice with .5pA typ, 250nV pk-pk .1 to 10Hz noise and 1uV/C drift?

The problem then is which <1pA leakage analog switches/Fets would be suitable if you wanted to automate it? It would seem that most of the devices used in the HP3458A front end are no longer manufactured.

[Kleinstein]

With the bias of a FET or JFET OP, you have to take into account that this is fast increasing with temperature. So the 0.1 pA typical is only at 20 C. Warmed up might be more like 30 C and thus 2 or 3 times more.

The suitable switch is a relay. Low leakage FETs might work, but need quite some effort to drive the gate without introducing to much extra leakage. Anyway such low leakage is not only a question if the circuit diagram, but also depends on the layout and actual construction.

The tricky circuit from EDN is more about how to create a small negative bias compensating current without a negative supply. There is a chance this solution might produce significant noise - at least that is one point I would look first before using it. The more traditional solution would be a photo-diode (might actually be a normal diode that is somewhat light sensitive) and LED, which usually scales quite well to small currents. This is especially true if the diode is part of input protection anyway and the voltage does not vary much as it is in the bootstrapping circuit.

[Gyro]

You have to wonder if the author actually built that circuit and tested it or just did a theoretical design. I wonder how stable it is and how low you can reliably cancel the input bias current?

In their early dvms (even as far as the 106x), Datron routinely compensated bipolar op-amps (LM312) and matched transistor pairs (typical 3nA bias) to achieve bias currents of <50pA long term stable and drifting at <2pA/C. They used a combination of bias current compensation and bootstrapped supplies.

I wonder if, with modern precision bipolar op-amps it might be possible to achieve much more stable results using similar compensation methods than the highly temperature sensitive bias currents of FET devices. Albeit with considerably more effort.

[Kleinstein]

I don't think using BJT and bias compensation is a viable solution: the bias drift before compensation is in the pA/K range even for low bias devices.
CMOS and JFETs with bootstrapping can be well below 1 pA up to 30 or even 50 C. So bias drift is more like 0.1 pA/K and less, unless the temperature rises to much. So a low temperature for the input devices is needed. Protection diodes may show similar leakage.

If may be possible to use a auto-zero amplifier together with bias compensation, since the bias has low sensitivity to temperature up to something like 50 C. This is especially true if using a bootstrapping setup and thus constant common mode voltage.

[dom0]

Cooling the whole assy below ambient might be an option since thermoelectric elements have become so cheap...

[Gyro]

As I say, that was using devices like the LM312 - '70s technology. If you compare the LM312 spec to even something like an OP-77 with similar level of attention to compensation......

[Kleinstein]

The LTC1052 is one of the few AZ OPs that still use external capacitors. This can help to get a low bias because of the low internal switching frequency. So there may not be a much better solution available.

Using an external bootstrapping circuit can help to overcome the limit on the supply voltage. A lower supply may actually help to reduce the bias with some devices (the LTC2057 seem to be an exception). A low voltage also reduces power in the amplifier and thus thermal problems.

Cooling seems good at first sight, but can get tricky, because of humidity and thermal EMFs.

[splin]

You have to wonder if the author actually built that circuit and tested it or just did a theoretical design. I wonder how stable it is and how low you can reliably cancel the input bias current?

In their early dvms (even as far as the 106x), Datron routinely compensated bipolar op-amps (LM312) and matched transistor pairs (typical 3nA bias) to achieve bias currents of <50pA long term stable and drifting at <2pA/C. They used a combination of bias current compensation and bootstrapped supplies.

I wonder if, with modern precision bipolar op-amps it might be possible to achieve much more stable results using similar compensation methods than the highly temperature sensitive bias currents of FET devices. Albeit with considerably more effort.

That's very interesting. Do you have any links to circuit diagrams?

[splin]

The Fluke 720A only has 7 decades, because at 0.1ppm you are *already* in "Thermal EMF" trouble.  At 70K output impedance, and with a 10V input to the 720A, 0.1ppm is about 14pA, so anything with 1.4pA or less should work, but I suspect you will have more troubles with Thermal EMFs at this level than you will with bias currents...

To get really low bias currents *and* very low drift, you may be looking at a hybrid amplifier [dual-JFET input with chopper circuit to remove drift].  It think that there was a Linear-Tech ap-note on just such a thing.

You're probably right - will start looking...

For a monolithic opamp, the closest thing will likely be an LTC1052A, but this has only 18V max rail [not good if you are going from +/-10 input].  If you limit the voltage input to the 720A to the common mode restrictions of the LTC1052A, then that looks to be your best bet.  To my knowledge, no other manufacturer has built a better ZD opamp with this low of a bias current and this high of a voltage rail [18V].

Note that the LTC1052A has quite a bit more input noise than the LTC2057, so if you are looking for less than 0.1ppm noise, you might compromise on the bias current and use an LTC2057 for that reason, and then just compensate for offset [since the LTC2057's bias current is rather stable to about 70C].  The LTC2057HV has the same specs, but is guaranteed to work with a 60V rail-- so it would allow much higher input range on the 720A for example.

The 2057 does have much higher current noise at 170fA/sqrt(Hz) compared to .6, but that only increases the noise to approx 300nV pk-pk with 70k source resistance so still much quieter in this case. CMRR is also 10dB better so it does seem to be a good choice, particularly if the bias current could be reliably compensated. The high voltage ability may not be much of an advantage though as even 150dB of CMRR equates to .032ppm at 10V and 150dB finite gain error another .032ppm, .064ppm total which is close to the KVD's .1ppm so bootstrapping may be required anyway.

Do you have any suggestions, or places to look for very low leakage input protection solutions? When I've looked in the past it seems to be not so easy to find suitable devices.
 

If the LTC1052A/LTC2057 solutions are not good enough for you, then you are off to see the wizard [Jim Williams] about a hybrid discrete+opamp+chopper solution...

It may come to that, but I'm interested to see how Datron compensated for Ibias and if similar techniques coiuld be applied to the LTC2057.

[Kleinstein]

Using the LTC2057 and bias compensation might be a good solution.

Low leakage diode could be something like the BA199,  some JFETs (gate to source+drain), small area photodiodes or just the collector - base junction of small transistors. Here also some degree of bootstrapping can help to limit the voltage over die diodes and thus really bring the leakage down. Photodiodes might also be used to compensate the bias, but even normal diodes in a not perfectly opaque case (e.g. BA199) might be sensitive enough for this purpose.

[Gyro]

That's very interesting. Do you have any links to circuit diagrams?

I do if you're prepared to squint a bit! I've never found a copy online, I meant to scan the whole manual sometime but my trial copy of Scan-n-Stitch expired (they're A3 schematics).

Attached are the input board schematic, including i/p protection (Datron used a combination of JFETs, Zeners and an 88k 8W series resistor chain!), Ib compensation and bootstrapped supplies. Q11 (TO92) is thermally coupled (superglue) to the LM312 (TO99) under a plastic cover. The double sided PCB copper is arranged to be as isothermal as possible around them.  All resistors are carbon film (apart from the high >10Mohm ones which are carbon composition).

As I say, they managed to achieve >10G input resistance, <2pA/'C and 0.2uV/'C using VERY humble parts by today's standards and with no cpu to do auto-zero or correction in these units. My unit holds within 1-2uV from cold to operating temp on the 10mV range (x100 gain) with no appreciable long term drift (well aged by now!)

The next generation - 1065/1061 are all evolutions of the same basic starting point, but with a cpu for compensation, autocal, autozero etc.

I've also attached the relevant page from the circuit description.

Hope it's at least of historic interest anyway.

[Gyro]

Just for completeness, here is the later input circuit used on the Datron 1041 / 1051.

It uses a LM394 dual matched transistor and an LF355 in place of the LM312. Quite a lot of added complexity for very little gain in stability (Instrument specs are identical in fact). The bootstrap supplies are on a different sheet but are identical to the previous one.

[XFDDesign]

The Analog Devices AD8616 might be a good candidate if you apply some bootstrapping. 0.2pA typ, 1pA max. The typ CMRR is only 100dB so you would have to wrap some bootstrapping around it to get the extra 40dB and use it as a buffer stage.

[poorchava]

As far as I know LMC6001 offers lowest guaranteed bias current at 25fA. It was even featured in 'what is this femtoampere stuff anyway' with Bob Pease. Arcane stuff going on there...

Wys?ane z mojego HTC One M8s przy u?yciu Tapatalka

[dom0]

10 µV/K offset drift and +-1 mV offset...

[Marco]

0.2uV/'C

Which is still 10 times as much as an auto-zero.

Just use a AD8638 or a LTC1052 and throw an aggressive low pass filter at it to get rid of the noise and eat the slightly slow response on a setting change (maybe use some nonlinearity to speed it up a bit for large changes).

[Gyro]

Which is still 10 times as much as an auto-zero

Again...only to demonstrate the >25 times improvement that was achieved by supply bootstrapping and Ib / Vos compensation of the basic op-amp. Study / learn / use techniques or not as you wish.

[splin]

The Analog Devices AD8616 might be a good candidate if you apply some bootstrapping. 0.2pA typ, 1pA max. The typ CMRR is only 100dB so you would have to wrap some bootstrapping around it to get the extra 40dB and use it as a buffer stage.

Its a bit noisy at 2.1uV pk-pk and 1.5uV/C (typ) to 7uVC (max) would be a problem especially if the KVD is used at 1V or less.

Oddly figure 9, Ibias v temperature, shows approx 10pA @ 25C. Yet another duff datasheet 'typical' graph. Presumably the .2pA typ/1pA max spec is correct.

Its the first time I recall seeing a Voffset v common mode voltage chart in a datasheet (but I probably wasn't looking). Its pretty horrible - see attached. Around 3.5V as far as I can tell, one unit appears to exhibit an input offset change of at least 300uV over a change in common mode voltage of 250mV or so. That equates to a CMRR of  only 833 or 58dB! How does that allow them to specify 80dB minimum with Vcm = 0 to 4.5V? Another faulty chart? Wrong units? Is CMRR specified using a box method - ie. 450uV/4.5V = 80dB?

The headlined offset voltage is 65uV but the spec, in the Vs=5V table is actually 23uV typ, 60uV max - for Vs at 3.5V and Vcm = 0.5V and 3V. That's cherry-picking! At 5V its 80uV typ and 500uV max.

[splin]

As far as I know LMC6001 offers lowest guaranteed bias current at 25fA.

The LMP7721, LTC6268/9 and LTC6268/9-10 specify 20fA max at 25C, but they are all 'by design' unlike the LMC6001 which is claimed to be 100% tested.

[splin]

Just use a AD8638 or a LTC1052 and throw an aggressive low pass filter at it to get rid of the noise and eat the slightly slow response on a setting change (maybe use some nonlinearity to speed it up a bit for large changes).

On the other thread you pointed out figure 14 in the AD8638 datasheet showing .1pA Ibias at 25C, Vs = +/-8V. Does that seem likely given that it is specc'd as 1.5pA typ at 25C, Vs = 5V (table 2) and 1pA at Vs = 16V? (and shown as 1.5pA for Vs = +/-2.5V in figure 13). One of them is wrong given they are both supposed to be typical (though they don't specify the measurement setup for fig 14).

1pA is probably good enough, but there is still the question of how many units you'd have to test before you found a typical one.

[splin]

That's very interesting. Do you have any links to circuit diagrams?

I do if you're prepared to squint a bit! I've never found a copy online, I meant to scan the whole manual sometime but my trial copy of Scan-n-Stitch expired (they're A3 schematics).

Attached are the input board schematic, including i/p protection (Datron used a combination of JFETs, Zeners and an 88k 8W series resistor chain!), Ib compensation and bootstrapped supplies. Q11 (TO92) is thermally coupled (superglue) to the LM312 (TO99) under a plastic cover. The double sided PCB copper is arranged to be as isothermal as possible around them.  All resistors are carbon film (apart from the high >10Mohm ones which are carbon composition).

As I say, they managed to achieve >10G input resistance, <2pA/'C and 0.2uV/'C using VERY humble parts by today's standards and with no cpu to do auto-zero or correction in these units. My unit holds within 1-2uV from cold to operating temp on the 10mV range (x100 gain) with no appreciable long term drift (well aged by now!)

The next generation - 1065/1061 are all evolutions of the same basic starting point, but with a cpu for compensation, autocal, autozero etc.

I've also attached the relevant page from the circuit description.

Hope it's at least of historic interest anyway.

Thank you, very interesting. You have to admire the designer's skills given these date to the 70's (60s?). Even the recently released 34470A 7.5 digit dvm is only specified at < 30pA. I guess its considered good enough and not worth improving, or they'd rather sell you another instrument for your 'specialist application'.

I wonder how the 1061 design deals with the LM312's offset variation with input resistance given the latter is in the control of the user?