USB JTAG Programmer - PCB Layout Advice

[David]

Hi all,
I am currently working on a "USB-Blaster" like JTAG programmer as a part of a larger project I am doing. I have found it hard to route the layout as the CPLD used has 0.5mm pitch pins and I dont really want to use lower than 0805 parts (caps/res). Has anyone got some good advice for routing tight pitch components? I am currently working on an FPGA based project (144-pin TQFP) and routing the de-coupling caps alone is a nightmare!

I have attached the pics of my JTAG programmer layout (Sorry for JPEG quality):

http://biketrialsdave.pwp.blueyonder.co.uk/Blaster1.JPG
http://biketrialsdave.pwp.blueyonder.co.uk/Blaster2.JPG

Cheers,
Dave

[charliex]

what about putting some of the caps on the other side of the board?

[EEVblog]

Did you autoroute that?
Passive component placement is not optimal around the chips.
R7 as one example, and it doesn't look like any of the bypass caps are actually right at the power pins. Probably not a problem in this design, but indicative that placement can be much improved.

I assume you'll ground fill the bottom layer too?

Remember good PCB layout is 90% component placement.

Dave.

[jahonen]

How many signals you need to route out of your FPGA? If you really want to make it good (especially with that 144-pin TQFP one), then forget 2-side PCB and go for 4-layer. Then you can use internal layers for ground and VCC planes alone. Makes your job much easier and gives much better results if you care about EMC and signal integrity (like I do very much even on my hobby projects).

BTW, that was not very easy even with 0402-sized caps and 6 layers, still the capacitors were very much PITA. See here.

Regards,
Janne

[David]

Did you autoroute that?
Passive component placement is not optimal around the chips.
R7 as one example, and it doesn't look like any of the bypass caps are actually right at the power pins. Probably not a problem in this design, but indicative that placement can be much improved.

I assume you'll ground fill the bottom layer too?

Remember good PCB layout is 90% component placement.

Dave.

This was my first go at manually routing the board. The problem I found with putting the caps right by the power pins is that they obstruct the other adjacent pins. I haven't filled the bottom layer but I think that may help, thanks.

Dave

[David]

I will be routing nearly every signal on the FPGA. I feel a 4 layer board is probably going to be essential. I will have to look into how to do this in eagle.

Dave

How many signals you need to route out of your FPGA? If you really want to make it good (especially with that 144-pin TQFP one), then forget 2-side PCB and go for 4-layer. Then you can use internal layers for ground and VCC planes alone. Makes your job much easier and gives much better results if you care about EMC and signal integrity (like I do very much even on my hobby projects).

BTW, that was not very easy even with 0402-sized caps and 6 layers, still the capacitors were very much PITA. See here.

Regards,
Janne

[David]

Made a few suttle changes:

http://biketrialsdave.pwp.blueyonder.co.uk/BlasterFinal.JPG

[EEVblog]

Made a few suttle changes:

http://biketrialsdave.pwp.blueyonder.co.uk/BlasterFinal.JPG

Better.
As a rule you should be using more ground stitching between top and bottom layer. Don't be shy to put extra vias, it doesn't really cost you anything.
The bypass caps are still too far away from the chips IMO. U1 and U2 for example have plenty of room to put the bypass caps right at the pins.
You should put the bypass caps right at the pins first before you route anything, and then work around them. Then only move them away if you have no other choice.
You seemed to have placed all the passive parts away from the chips in neat alignment and then routed *to* the chip. That technique can produce aesthetically pleasing placements, but it's not so good for signal integrity.

What is your routing width and grid?
Don't be afraid to go down to say 5 though track and spacing if you are having the board professionally manufactured, that will give you much greater routing density.
Other niceties, like C2 and C3 should really be at the back of the connector to prevent those unnecessary long traces going to them.

Apart from a few subtle placement things and the odd trace, I do like your layout, it looks quite neat, and you've followed good aesthetic design practices.

Dave.

[David]

Thanks for the positive critisim Dave! I am using 8 mill track/grid. I will further refine it later on today.

[jahonen]

Yep. If the bypass capacitors are behind large inductance, they become quite useless. You may as well remove them, they just take up valuable PCB space but serve no practical purpose. They should be between the power rail and the IC, so that IC power pins connects directly to the capacitor (proper technique for a 2-side PCB). Remember that GND and VCC connections are equally important. Same goes for C15-18, signals from the pin header at the right side of the board should be routed first to the capacitors, and then from the capacitors to the rest of the circuit. And like Dave mentioned, use tons of ground stitching vias.

And since you have a CPLD on the board, try to find a better pin assignment for the signals so that it makes your layout easier. It takes often a while to iterate the pin assignments, but it really is beneficial at the end.

Regards,
Janne

[GeekGirl]

And since you have a CPLD on the board, try to find a better pin assignment for the signals so that it makes your layout easier. It takes often a while to iterate the pin assignments, but it really is beneficial at the end.

I use Altium Designer Summer 09, and have a feature called pin swapping (not sure about Eagle never used it) where I can put groups of pins in to an array, and then on the fly doing the PCB, I can swap pins around in the group to make signal routing easier.

[David]

Well I made some final adjustments, moved some capacitors, added more stiching vias and tweaked some routes. I have sent the order off to PCB Cart so now all I can do is wait! Only my second PCB so fingers crossed it all goes well

Dave

[charliex]

For my own question, about putting the capacitors on the other side of the PCB for the USB connector, since thats what i've been doing and most of the time the pins are thru hole, so the caps are as close to the pins as possible? 

Is that a poor design  choice ?

[jahonen]

Putting the capacitors below the components is not a bad practice. I have done it myself when I used through-hole parts. Especially with quad opamps, 1206-sized caps fits just nicely between pins 4 and 11, or two 0603s when used with split supplies. It really is a question of power supply impedance. At high frequencies, it is the inductance which determines the impedance. Inductance is proportional to the loop area. Putting the bypass caps below the component is also usually done with the BGA components, since you can't place discrete capacitors any closer to the package otherwise (except with expensive buried passive components technique).

Regards,
Janne

[charliex]

Thanks Janne,

I usually just do the prototyping, then if when it goes commercial the board gets sent off to a professional layout guy in Australia. But there is no reason to pick up bad habits, or just assume something is Ok because i've seen it before.

cheers,
charlie

[Neilm]

If you want to have some advice on layout for PCBs - especially if EMC is a concern I would recommend going to http://www.compliance-club.com/ and look for the articles by Keith Armstrong. He release a very good book a year or so ago on this topic and summarised in this publication. Registration is free. I work in electronics designing instrumentation and have found that applying these techniques has saved a lot of time and hassle - the project I am working on at the moment just sailed through the required tests and that produces high voltage (100kV) sparks as part of the test sequence.

Yours

Neil

[David]

I am now about to start the layout process of my latest project design but I need some more advice... The design is based around a Cyclone 3 FPGA and all 94 I/O's are being use (Its a custom development board). My senses are telling me that I should use a 4-layer board? I am also thinking I'm going to need 0402 caps/resistors? Are these particularly hard to solder using hot air reflow by hand?

Regards,
Dave

[jahonen]

I don't have much experience on the hot air reflow with chip components (I think that using soldering iron is easier/faster with those ones), but with soldering iron it needs just a little more care when placing the parts. I suspect that hot air reflow is ok. Also note that multilayer PCBs tend to be a quite good heat sink, so you'll need more heat than with a 2-side design. This is most notably obvious when soldering ground connections or similar pads connected to large plane areas.

Bottom line is that if you have room for larger components, then use them. 0603 is perhaps the optimum size for me, smaller is notably more difficult to solder and larger ones are not that much easier. But try it out, your mileage may vary.

Regards,
Janne

[charliex]

I can hand solder 0402 (metric) but i'd rather not !

I use a very fine tip 700F to do it and not the hot air station though, but i'm not using paste just solder. I'm looking at making some brass stencils and solder paste this week.

The biggest problem i have with them is that if it jumps off somewhere its very hard to find again

There is a company with reasonably priced preheater that i've thought about trying if i had to do more than a handful of components http://www.zeph.com/  but i've never used it, or even know if its really required.

[David]

Well a last minute change to my design (for the JTAG programmer) has shot me in the foot! I changed the supply voltage to the crystal module from 3.3V to 5.0V only now to discover that these are no longer made and cannot be found anywhere! I have sent an email to PCB-cart and fingers crossed I can send them the updated gerbers. 

Dave

[jahonen]

Well, I can only say that these things happen, no matter how deeply the design is reviewed As long as you can fix it with some wire wrap, I think it is okay for the first prototype. At my work, it is often third or fourth revision of the PCB what is actually good enough for production (with all mechanical, functional, performance and EMC problems fixed), and certainly not before the second round.

Worst thing I have ever encountered was that PCB had completely wrong land pattern for a BGA, which was not noticed until assembly house informed that they have some trouble assembling the prototypes Needless to say, the boards were just a bunch of junk.

Regards,
Janne

[charliex]

I think thats why i switched to software early on in my career its a lot easier to patch. Though i've had plenty go out for mass production on CD with errors you find out about two minutes after the last one is pressed and no way to patch it. that sinking feeling as you realise you forgot something.

did you try findchips.com ? i've had some luck with it finding some parts, one of our ECU's uses an old renesas chip,and renesas seems to update every time you use one of their chips, i've had a heck of a time finding the dev board and debug interfaces for a few of them.

[EEVblog]

I am now about to start the layout process of my latest project design but I need some more advice... The design is based around a Cyclone 3 FPGA and all 94 I/O's are being use (Its a custom development board). My senses are telling me that I should use a 4-layer board? I am also thinking I'm going to need 0402 caps/resistors? Are these particularly hard to solder using hot air reflow by hand?

0402 are at the point where it becomes difficult to solder then by hand without using a good microscope, avoid and use 0603 if you can.
Various assembly houses that do protos and small runs by hand charge a LOT more for 0402, because they are much slower to handle and assemble and harder to visually inspect.
For automated assembly it's not a problem though.
(I can do 0402's by eye, but I usually solder them under the Mantis (x4 or x8) scope)

You don't necessarily need a 4 layer board for a 96 I/O pin FPGA (TQFP package I'm presuming?), but it will help. The decision might come down to production cost. Get a quote for the same board from PCBcart for 2 and 4 layers and see if the cost is acceptable in production, if it is then go with the 4 layer board.

Dave.

[David]

Thanks for the advice. Yes it is a TQFP. Regarding my Micro-Blaster, I got in contact with PCB cart but unfortunately they had already started the etching process. However, I was able to update all my layers for $36 (£18) so I think I escaped lightly!

[David]

Well I've just finished populating the board. A fine nozzle/solder paste and hot air reflow soon had those IC's down Stage 1 of three is complete with testing (Its recognised by my pc..).



Dave