One chip logic operation challenge

[chebeba]

Actually yes that would be a good use, (that or an optocoupler / analog switch to ground) as its a diode the truth table can only be filled when a positive and negative are provided one way,

Haha! Very creative idea Certainly small in terms of real estate. I will keep that on in the back of my head, although for this application the LED consumes too much power.

[oPossum]

It can be done with half of a 74HC03

No, this does not provide High Z output.

Yes it does - the 74HC03 is open collector output.

[jwm]

I keep on meaning to write a 'logic optimizer' that will take a truth table and optimize to the lowest chip count using standard 74/4k components using all of don lancasters tricks from his cookbook. It would be a fun project, I could see it being used as a standard homework assignment in a programming course on algorithm design rather than the standard 'program to play checkers' or whatever is used to teach branch and bound techniques.

[dannyf]

to write a 'logic optimizer'

Those fpga/cpld compilers do precisely that, and many more.

[jwm]

to write a 'logic optimizer'

Those fpga/cpld compilers do precisely that, and many more.

No, they optimize to minimum gate count, or at least to the specific internal architecture of a given CPLD/FPGA such as minimum usage of LUTs in FPGA or summation terms in a CPLD perhaps.

The espresso algorithm works pretty well for pure gate count optimization on this scale, I used a variant of it for programming GALs.

I want to optimize for minimum _chip_ count of a limited set of readily available chips, or find a way to implement it with a specific subset of chips. As in, answering the type of question that started this thread. Also, in addition to the one, zero, and don't care it also must understand things such as open collector, tri-state, and so forth and use resources like the 4066 switch that isn't quite a logic gate but quite handy for simplifying logic circuits.

[dannyf]

I want to optimize for minimum _chip_ count of a limited set of readily available chips,

Easy: limit your "readily available chips" to NAND gates and use the said fpga/cpld software.

That's actually what I do - HC132 all the way,

[jwm]

I want to optimize for minimum _chip_ count of a limited set of readily available chips,

Easy: limit your "readily available chips" to NAND gates and use the said fpga/cpld software.

That's actually what I do - HC132 all the way,

Due to a misorder a while ago I ended up with 250 extra 74LVX14 chips. Turns out you can find a whole lot of things to do with schmitt inverters... My favorite recent trick is to use two in a loop with 10k resistors and diodes as a S/R latch. That's three S/R latches with inverting an normal inputs and outputs per 74xx14! I even made up little breakout boards (picture attached) for them to motivate me to breadboard with them more. I call them schmites (schmitt + mite).

When I am feeling nostalgic for the apollo guidance computer I limit myself to 3 input nor gates.

[Mechatrommer]

Lets go overboard, use a 8 pin pic uC

With tri-state outputs? They exist? 

try smaller 6pins sot like pic10f200, you have extra 1 pin to mess around. 3 drawbacks.. 1) respond time can be a problem in some app 2) it sucks more power 3) you need to program it.
edit: duh this is a 3 pages thread i tot i thaw a putty tet.

[dannyf]

74LVX14

As a basic building block, a NOT gate is not as useful as a NAND or XOR gate.

[jwm]

74LVX14

As a basic building block, a NOT gate is not as useful as a NAND or XOR gate.

Since it is schmitt, all you need are some diodes to turn them into NOR,OR,AND or NAND gates. No easy way to do XOR I think..

http://www.musicfromouterspace.com/analogsynth_new/ELECTRONICS/mickeymouselogic.html

[zapta]

You can try an analog/switch/mux with at least two digital input. The correct combination will connect the output to ground, floating otherwise.

Here is an arbitrary example, there are many more.

http://www.nxp.com/documents/data_sheet/NX3L4357.pdf

Here is another one, with easier to solder package

http://www.toshiba.com/taec/components2/Datasheet_Sync//165/7442.pdf