Two-MOSFET soft-latching startup switch

[asgard]

I hope that something inordinately stupid is going on with my little grey cells .

I have here, first, an LTSPICE simulation of a two-MOSFET soft-latching circuit, with plots of the trigger and output voltages.
C1 also works in the simulation at 1uF perfectly well.  The second picture here is the EAGLE equivalent circuit using an actual dual IRF7343 MOSFET device.  The problem I am having with this is that when the actual hardware is assembled the output voltage seems to be stuck in the "on" level, with no change other than a brief spike in the gate of M1.  Is this a case where LTSPICE has led me astray, and if so, how much can I rely on SPICE models in the future to correctly characterize specific real-world circuitry?   

J.R. Stoner

[Psi]

I notice you have the led+resistor connected differently in LTspice vs the diagram.
If you're using that to tell you the state you maybe getting confused.

In LTSpice you have led+res powered from drain D2 (the output) but in the circuit diagram you have it off drain D1.

So the LED will always be on as current will flow from VCC through the 10k then the 1K then the led to gnd.

[asgard]

My test board actually has the LED and resistor connected to D1, which is (I hope) supposed to be what the SPICE model relates.
I am _really_ hoping the SPICE model is not telling me a fib, as the LED sinking from D1 only shows brief spikes (about 125msec) no matter how long S1 is pressed.

Here is the picture of the test setup in actual hardware.