It comes down to the data rates your after, Canbus is an example of a bus that can handle multiple devices outputting at the same time, and can handle data rates over 1Mbit at a few meters distance.
If your looking more at an older CPU with address decoding for a bus, then in general there is 1 master, and peripherals on the bus that are used to talk to other things, so the cpu master would select a new address, the decoder would disable the old device, and enable the new, the master would wait a number of cycles then change the bus from tristate to active and communicate with that peripheral.
Even if you had a secondary processor it was generally slaved to the master, you see the same occuring in modern MCU's, they may have multiple independant DMA channels, controlled by a DMA controller, but the master processor configures the dma peripheral then hands off that connection to it, Its still acting under the master, even if its a seperate peripheral now controlling the bus, the processor waits until the peripheral returns a completion state, then retakes control.