Triggering a thyristor with small currents?

[Phil1977]

Hi,

has anyone knowledge about the trigger behaviour of medium sized thyristors? Like a BTW69-1200?

The trigger current is specified in the Datasheet between 8mA and 80mA. My question is, is it damaging for the thyristor to be triggered with a low current near the trigger threshold? Or is it recommended to use a DIAC or any other circuit that ensures a minimum gate current so that the whole semiconductor switches on without any potential "islanding"?

[Zero999]

The problem is, too lower current will mean it doesn't reliably trigger.

[Phil1977]

Let´s assume I rise the trigger current until the thyristor fires.

Is this okay or should I use a DIAC as the first stage ?

Background: I want to de-noise the trigger input by a RC filter. That means that the voltage at the C rises together with the gate current until the thyristor fires. I somehow remember that there are high power semiconductors that are prone to islanding, meaning that with little control current only a small part of the die surface gets conductive and so it´s dissipating too much specific power in a too low area and in consequence gets destroyed.

Is this an issues of thyristors (SCRs) or was it just about a certain trigger conditions of TRIACs?

[andrewtaylor]

Slowly increase of trigger current will likely damage thyristors due to locally overheating the silicon when he main current (between A and K)  flow starts.

that's why all manufacturers recommend a cerain minimum rise time for the full  (guranteed minimum) gate current.

Same physics applies to TRIAC  semicondcutors.

[mag_therm]

Safe gate voltage and current ratings were always confusing, especially in smaller scrs with abbreviated ratings.

BTW69-1200, ST datasheet, refer firstly to the maximum allowable  peak gate current of 8 Amp for 20 us and dissipation 1 Watt on Table 1
Table 2  ( I think) shows that all ( the most insensitive) units will trigger at 25C with  Igt => 80 mA.
Then the Fig 4 shows the variation with temperature ; Igt needs to be 2.25 times higher to trigger all units at -40C.

So with this scr there is a wide latitude and you could aim for a pulse of  250 to 500 mA with a rise time of < 1 microsecond,
and a pulse length to ensure the latching current rises to > 200 mA in your external circuit. (snubbers help this)

The islanding (localised overheating) should not occur if safely above Igt minimum at 1 us.

The best specifications included a safe triggering area on the gate  Vt versus It over temperature.
These graphs were usually only included with the larger scrs.
This method of triggering specification is shown and described in detail on section 4.5 page 85 of the GE SCR Manual.
Maybe it can be free accessed here: https://archive.org/details/GESCRManual1964

A partial safe triggering are graph could be constructed for the BTW69 using the available points.

[Zero999]

Let´s assume I rise the trigger current until the thyristor fires.

Is this okay or should I use a DIAC as the first stage ?

Background: I want to de-noise the trigger input by a RC filter. That means that the voltage at the C rises together with the gate current until the thyristor fires. I somehow remember that there are high power semiconductors that are prone to islanding, meaning that with little control current only a small part of the die surface gets conductive and so it´s dissipating too much specific power in a too low area and in consequence gets destroyed.

Is this an issues of thyristors (SCRs) or was it just about a certain trigger conditions of TRIACs?

I think the  problem is, an thyristor can behave like a transistor when the trigger current is low. The trouble is, the safe operating area of an SCR is small. If it's not saturatied i.e. has a decent current and high voltage across it, it can go into secondary breakdown.

Adding a DIAC or SIDAC to an RC circuit will cause the capacitor to discharge into the gate, once its charged past a certain voltage. This will ensure a decent current spike and rapid turn on.

What logic circuitry are you using? I like to use pulse transformer to trigger SCRs. The advantages are galvanic isolation and the turns ratio can step down the voltage and boost the current, providing a better match betweem the gate voltag of around 1V to the 12V or whatever the trigger circuit is powered off.

[Phil1977]

Safe gate voltage and current ratings were always confusing, especially in smaller scrs with abbreviated ratings.

BTW69-1200, ST datasheet, refer firstly to the maximum allowable  peak gate current of 8 Amp for 20 us and dissipation 1 Watt on Table 1
Table 2  ( I think) shows that all ( the most insensitive) units will trigger at 25C with  Igt => 80 mA.
Then the Fig 4 shows the variation with temperature ; Igt needs to be 2.25 times higher to trigger all units at -40C.

So with this scr there is a wide latitude and you could aim for a pulse of  250 to 500 mA with a rise time of < 1 microsecond,
and a pulse length to ensure the latching current rises to > 200 mA in your external circuit. (snubbers help this)

The islanding (localised overheating) should not occur if safely above Igt minimum at 1 us.

The best specifications included a safe triggering area on the gate  Vt versus It over temperature.
These graphs were usually only included with the larger scrs.
This method of triggering specification is shown and described in detail on section 4.5 page 85 of the GE SCR Manual.
Maybe it can be free accessed here: https://archive.org/details/GESCRManual1964

A partial safe triggering are graph could be constructed for the BTW69 using the available points.

Thanks a lot! How great would it be if this info would be in the datasheet! At least a simple advice like: "Do not trigger the device with less than 80mA and more than 1us of rise time" would make it much easier.

But luckily this information is shared here in this forum.

Let´s assume I rise the trigger current until the thyristor fires.

Is this okay or should I use a DIAC as the first stage ?

Background: I want to de-noise the trigger input by a RC filter. That means that the voltage at the C rises together with the gate current until the thyristor fires. I somehow remember that there are high power semiconductors that are prone to islanding, meaning that with little control current only a small part of the die surface gets conductive and so it´s dissipating too much specific power in a too low area and in consequence gets destroyed.

Is this an issues of thyristors (SCRs) or was it just about a certain trigger conditions of TRIACs?

What logic circuitry are you using? I like to use pulse transformer to trigger SCRs. The advantages are galvanic isolation and the turns ratio can step down the voltage and boost the current, providing a better match betweem the gate voltag of around 1V to the 12V or whatever the trigger circuit is powered off.

A pulse transformer seems a good idea. Currently I operate it with a triggerswitch on a cable, but a differential logic input will follow there soon. My first plan was to use a reed-relay with a RC-filter to get rid of contact bounce, but a pulse transformer really seems to be better.

I´ll read me through the GE SCR manual before making further plans 

[PCB.Wiz]

Thanks a lot! How great would it be if this info would be in the datasheet! At least a simple advice like: "Do not trigger the device with less than 80mA and more than 1us of rise time" would make it much easier.

But luckily this information is shared here in this forum.

The ST data has a clue here :  They give a gate drive and rise time for their turn on time.
tgt ( IT = 50 A, VD = VDRM, IG = 200 mA, dIG/dt = 0.2 A/µs)   TYP. 2 µs

[Benta]

I'm unsure whether you know how DIAC or SBS triggering of an SCR works.
Basically they pulse discharge a capacitor into the gate of the SCR, so trigger current is seldom a problem if the capacitor is sized correctly.

This is nice for triggering on a ramping voltage (like mains AC), but not really useful if you want to trigger the SCR freely.

[T3sl4co1l]

Yup, DIAC works nicely for one-shot trigger.  For continuous trigger (e.g., where you don't know the phasing of load current, you just want it on at some point), the usual method is a gated clock into a transformer.  Since the gate needs at most a couple of volts, a driver from 12V can get plenty of leverage against it with a modest turns ratio.  Maybe a few 10s of mA, through a BJT/MOS switch, into a 4-6:1 turns ratio.  A series resistor between secondary and gate, and a catch diode anti-parallel with G-K, and you're good.

Of course, if you need more precise timing (within ~µs), it might be that the enable comes along during a low period of the clock and doesn't fire until the next pulse.  In that case, either an oscillator-enable can be used (starts pulsing immediately; first pulse may be unevenly timed, like when using a 555 this way), or drive it full-wave into a push-pull transformer, with rectified secondary into the SCR gate (make sure to have a nice beefy pull-down resistor G to K to ensure it discharges when undriven).

Tim