Again, even pad length itself may be a factor in the capacitor impedance; let alone the gap between neighboring capacitors. There is no such thing as an ideal (all points perfectly joined) net at those frequencies. An EM model of the PCB must be extracted, using fancy software like Ansys (though it looks like there are several other options nowadays, even a Solidworks plugin?) to generate a model between all component ports (pad pairs) of given layout.
Bypass for 2.4GHz RF applications -- discrete amplifiers -- involves alternating stages of 1/4 wave traces and stubs (hence the typical motif, a thin trace joining to a wide sector shape), chains of bypass caps with lots of GND stitching vias, and ferrite beads to absorb rather than reflect residual energy. Impedances are modest (10s Ω), so the mismatch of a few stubs and bypass caps achieves adequate filtering.
Bypassing an IC at such frequencies is absurd -- at least, in anywhere near the same way we do for lower frequencies. For small radios (supply is high impedance, i.e. some ohms or more), only one or a few supply pins are taken out, and we might employ the above solution; some 2.45GHz leaks into the board, or 900MHz or whatever we're doing, and we need to isolate and absorb whatever is left before joining it to the main board supply. DC current is low, too, so a small chip ferrite (or few) suffices.
What we do for lower frequencies, high currents, low impedances, is make mass connections. Like VCORE/GND on a BGA SoC, multiple pads are wired in parallel, and more or less each one (or pairwise or other small groupings) must be locally bypassed, and still the fact that the package sits 0.5mm or whatever above the say 1mm thick PCB, means we can't get less than some, whatever, 10s pH, between the closest possible bypasses (underneath chip, flanked by vias) and the device itself. If the threshold impedance is say 0.1Ω or less, then we have a cutoff frequency in the low 100s MHz, above which the impedance must rise and there's nothing we can do about it on the board level.
Which is perfectly fine, chip makers know this. That's why you see tiny, wide-format, and even LGA style, bypass caps on the interposer for these devices; that's why the interposer itself is made out of so many layers, and such fine-pitch wiring (it also needs to wire-bond or solder-bump directly onto a chip with hundreds or thousands of pads on it..!). That's why the die itself may have piggyback caps, or in any case is made with multiple alternating metal layers distributing power around, to crank up the capacitance; even individual groups of transistors may be arranged so their capacitance acts as bypass for each other (skewed clocks between adjacent domains, designing logic blocks so that only a fraction of transistors switch on any given edge, etc.).
Probably anything more powerful than Bluetooth has a similar scheme, i.e. onboard bypass, or decoupling in any case, to keep the impedance requirement at 2.45GHz high, so that extremely wide / numerous-pinned connections aren't required at the board level. A typical RF amp anyway has a constant-current characteristic, either supplied through a choke (decoupling!), or balanced (push-pull cancelling out the fundamental), or both, and all you have to do at the board level is mop up the residuals, and not make a resonance with the onboard decoupling (i.e. keep it modestly low impedance, and resistive/flat).
Tim