Author Topic: Reverse engineering the FNIRSI 1014D  (Read 7491 times)

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Offline pcprogrammerTopic starter

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Re: Reverse engineering the FNIRSI 1014D
« Reply #50 on: September 25, 2024, 02:13:58 pm »
A member wrote me a personal message with the request for some information about the development of the software for the 1014D as they want to join in. I answer the questions below so others might find it beneficial.

  • Can you give me a brief about the the current state.
    The development state is where I left of in this thread. Only the basic scope functionality is implemented, but hardly tested. It is based on the development done for the 1013D, but rewritten to fit the 1014D user interface. It does give a good starting point for further development.
  • What loads the fw from SD.
    This is basic functionality of the F1C100s. There is code in ROM that scans for a valid bootloader. It checks the SD card before it heads on to the SPI connected FLASH memory. By having a signature header in the first 32 bytes of sector 16 of the SD card, the code knows that it needs to load the program from the SD card. This bootloader then initializes the DRAM within the F1C100s and other hardware needed for running the main program, before loading the actual firmware to the internal memory. It also allows for starting the original firmware or the FEL mode.
  • Why 16meg.
    I assume 16GB is meant as size for the SD card. This is not mandatory. It works with different sizes of SD cards, as long as there is enough free space before the FAT partition. 1MB is sufficient. There is an issue with detecting the card speed though, as can be read in this thread.
  • Does the firmware backup file work on the 1014D.
    Yes there is a version made for backing up the original 1014D firmware. It can be found here.
  • Does it back up the FPGA.
    No, because this is not possible with the way they implemented it. The FPGA is loaded from a separate FLASH chip and there is no way for the processor to read from that FLASH.
  • Does it backup the full flash or a set range?
    The code creates two files. One is a backup of the full FLASH and the other is just of the firmware section of the FLASH. Have not tried it, but I think it is possible to use it in the way a normal firmware upgrade is done on the 1014D.

The message I received stated the below.

Quote
I'd like to start with the function gen and a bode plot to get more helpers and support.
Thanks for the hard work you've been putting into this. It opened doors that I couldn't even imagine.

The latest version of the code is in the repository found here.

For the function generator it is necessary to implement the controlling of the clock synthesizer chip. The code so far only initializes it for the needed FPGA main clock and sets the function generator clock to its max of 200MHz. See "clock_synthesizer.c" for more on this.

The function generator is made with a lookup table in the FPGA and the step through is based on the frequency set with the clock synthesizer. I will have to consult my notes on my other system to provide more information on this.

My advice is to fist look into the code in the repository and play with it a bit. For easy testing the FEL mode can be used to load the new code to the internal memory via USB causing less wear on the SD card. Scan the thread about the 1013D to find more information about this.


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