First PCB Design. Feedback please.

[gregallenwarner]

First off, I'm still relatively new to electronics design, and so I was hoping I could post my first PCB design up here for you all to review or give constructive feedback. Such as, what I should've done differently, any EE cardinal sins I've committed, that sort of thing. I've got no formal training, so everything I know is self-taught or learned from watching Dave. I'd really appreciate any knowledge you all can impart to me by reviewing my project.

What I've designed is a bare-bones, minimalistic CPLD dev board. I'm calling it, the "micro-MAX", since it uses an Altera MAX3000A and it's a "minimalist" dev board. It breaks out all the IO pins to standard 2.54 mm headers. It has a USB-Blaster-style 10-pin JTAG header, so you must supply your own USB-blaster-compatible programmer when using this board (again, bare-bones approach). I've built a prototype using a breadboard and a TQFP breakout board, and I tested it and everything works perfectly.

Some of the other components provided on-board: a 3.3 volt linear regulator, with the 3.3 volts broken out to one of the pins so you can supply the rest of your project with 3.3 volts. Also, there's an oscillator on-board. I've gone with the 3225 footprint, but I haven't specified a speed so that I can just choose whatever speed oscillator I want in that footprint, depending on what speed I need for the project. There are two 3-pin 2mm headers that are connected to this oscillator. One connects the oscillator's ENABLE pin to either high or low, so you can use a 2mm jumper to enable or disable the oscillator, as your project requires. The 2nd 2mm header selects which pin on the CPLD the oscillator's output goes to (either GCLK1 or OE2/GCLK2), so you can have a choice over that. There's also a reset button tied-high connected to the global CLEAR pin on the CPLD. Last, there are two LED's just hanging out just in case you might need them. They're just connected to a 2-pin header that's not connected to anything else, so you would have to install a jumper from the LED to the output pin of your choice, should you want to use it.

I'm going to be assembling these things by hand, at least initially. I've placed a few components on the under-side of the board (bypass caps and pull-up/down resistors) to save a little bit of room. I've done this on other little proto boards in the past, and it's always worked well for me. If there's any reason at all that you'd recommend against this, please, let me know. I plan on reflowing the top first, then doing the bottom components manually with an iron. I'm real good at soldering 0805's by hand.

I've attached the Eagle project files, as well as some low-res renderings of the top and bottom sides, if you don't want to bother downloading the source files. I should also mention that the design is heavily influenced off of this one I found at Dangerous Prototypes:
http://dangerousprototypes.com/docs/Jose:_Altera_MAX3000A_CPLD_breakout_v1
However, I did not directly download that project and modify it. Mine is made entirely from scratch. I figure I should probably mention the inspirational source, when it comes to adhering to all the open-source restrictions, but since I didn't use their project files, should I mention it in my documentation anyway? After getting feedback from you all, I plan to upload this project to my website and release it as open-source.

I'd be real grateful for any constructive feedback you can give me to help me improve. As I said, this is my first real design, so I'm looking to the community to show me if there's anything I needed to have done differently, since my lack of formal training makes it difficult for me to spot problem areas. Obviously, I've run a DRC against the design rules for the fab house I've selected, and Eagle reports no errors. But I'm looking to see if there are any EE design standards or best practices that I need to be aware of.

Thank you for taking time to review my project.

Edit: I forgot to attach the rendering of the schematic. Now it should be there.

-Greg W.

[Sebastian]

You could increase the gnd-plane clearance if it does not cause any problems, just to be on the save side for the manufacturing.
I don't see any problems other than that, which is just a minor thing.

[gregallenwarner]

Are you referring to the gap around the ground plane and all the other components? I believe Eagle uses the design rules file to govern the thickness of that gap, am I correct? I'm using OSH park, which requires a 6 mil spacing between traces. What value do you reckon I should bump that up to, just to be safe?

[ovnr]

+1 for increase the plane clearance - I'd set it to 10 mil as long as that doesn't cause any issues (disconnects, etc).

Otherwise looks good. The bottom caps seem a bit tightly spaced - I'd move them out by a small amount to avoid solder bridges when you're faffing around with an iron down there. Consider 0603s - they really aren't much worse than 0805s.

[gregallenwarner]

Good advice on the 0603's. I've considered them in the past, but the only reason I went with 0805's is because I've already got a huge stack of them in my parts bin. They're leftover from when I used to build prototypes on perf-board, and I found that the 0805 packages fit real snugly between two pins on a 0.1" perfboard!  Whenever I decide to do a production run of this dev board, I'll go ahead and switch to 0603's since I'll need to buy parts anyway.

[Sebastian]

Are you referring to the gap around the ground plane and all the other components? I believe Eagle uses the design rules file to govern the thickness of that gap, am I correct? I'm using OSH park, which requires a 6 mil spacing between traces. What value do you reckon I should bump that up to, just to be safe?

Yes, that's what I mean. I am sure how to set it in eagle, but I think you can right-click the polygon and set it in properties.
I would go up to 10 or 12 mil, as ovnr already suggested. Also, good call with the resistors.

[Dongulus]

Your clock enable/select header network is a bit redundant. You could remove the disable (or enable) header pin and install a pull down (or up) resistor. That way the clock is by default disabled or enabled and a jumper can be placed to set the opposite state. OR, since the output of the clock is by default not connected to either clock inputs without installing a jumper, you could tie the clock input to 3.3V to keep it always enabled and effectively disable it by not using a jumper for either clock input.

[gregallenwarner]

Dongulus, I see what you mean. What would be the EMI effects of a clock output left floating? Should I terminate the clock output through a resistor so that when it's not connected and it's sitting there free-running, it's not acting like an antenna? What are your thoughts on that?

Edit: I also edited the original post and added a rendering of the schematic, in case you want to go back up and reference that.

[Dongulus]

Dongulus, I see what you mean. What would be the EMI effects of a clock output left floating? Should I terminate the clock output through a resistor so that when it's not connected and it's sitting there free-running, it's not acting like an antenna? What are your thoughts on that?

That's a reasonable question. I think I'm at a similar experience level as you are in PCB layout so take my opinion for what it's worth. I don't think you would need to terminate the clock output. To me, the stub coming from the output of the clock looks too short to be an effective radiator. If you want some insurance, try to move the clock header as close as possible to the oscillator output.

If it were my design, I would probably keep the clock enable header and use a pull down resistor on the oscillator. I would also use a switch at the output of the oscillator to select the CPLD clock input. That way, I would know that the clock output will always go to one of the CPLD input pins.

By the way, why would you want to select which GCLK input the clock goes to? If it's not something you would need to change often, maybe you should just connect the oscillator output to both GCLK pins through 0 Ohm resistors then label the resistor that goes to whichever input you don't want to use as DNP.

[gregallenwarner]

By the way, why would you want to select which GCLK input the clock goes to? If it's not something you would need to change often, maybe you should just connect the oscillator output to both GCLK pins through 0 Ohm resistors then label the resistor that goes to whichever input you don't want to use as DNP.

I'm not really 100% sure why I elected to have the clock input selectable, I just saw that the MAX3000 has 2 global clock pins feeding the output flip-flops on all macrocells, so I figured I'd work that into the design now just in case I come across a situation in the distant future where I want to feed the oscillator into the secondary clock pin, as the primary one is being fed by something else, like a microcontroller's main clock, for synchronous operation with the uC for example. I dunno, I may never use it. I just like having the option. 

With this project, my design strategy has been to make it as customizable as possible without any unnecessary soldering. That's the reason for the 2mm headers and jumpers, as opposed to 0-ohm resistors, or solder bridges, as is the case with the Dangerous Prototypes version I linked in my original post. I'm not opposed to using those when the situation calls for it. I just figured in this instance, I have no idea what future ideas I'll want to try out with this thing, and so leaving as many options open for myself as possible, and making it as easy as possible to change on the fly, seemed like a good idea.

Thanks, all, by the way, for all the input. It's really helpful as I'm learning.

[PedroDaGr8]

Pin 4 and a pin across the way isn't connected to anything. It's connected to a plane that is connected to nothing. 

[lapm]

Are you referring to the gap around the ground plane and all the other components? I believe Eagle uses the design rules file to govern the thickness of that gap, am I correct? I'm using OSH park, which requires a 6 mil spacing between traces. What value do you reckon I should bump that up to, just to be safe?

That's 6 mils minimum clearance... Nothing there to prevent you use bigger clearance...

[jancumps]

Pin 4 and a pin across the way isn't connected to anything. It's connected to a plane that is connected to nothing.

it doesn't show clearly because of silkscreen, but I think it connects to the inside filing area under the controller on component side.

[gregallenwarner]

Pin 4 and a pin across the way isn't connected to anything. It's connected to a plane that is connected to nothing.

it doesn't show clearly because of silkscreen, but I think it connects to the inside filing area under the controller on component side.

That is correct. Those are ground pins, and they do connect to the fill underneath the chip. The silkscreen does make this difficult to see, but they are connected by the automatic thermals that are generated when you do a polygon fill. And the fill under the chip extends through 3 of the corners and through several vias to connect to the rest of the ground plane.