Mystery losses in half-bridge switch simulation

[uer166]

Background: experimenting with a 1-ish MHz LC resonant converter simulation. I'm encountering weird turn-on and turn-off losses due to shoot-through current in the half-bridge. Example sequence when going low->high:

• Turn low side off
• Dead-time of about 50ns is plenty to shut off low side switch fully
• High side Vgs reaches 15V quickly
• Here's where it gets weird: while high-side Vgs is already at 15V, the high-side Vds stays at 300V
• Current ramps up to 16A while the high-side Vds is still 300V, resulting in a huge power dissipation in the order of 5kW for 20ns
• The high-side Vds quickly reaches 0V and all is well from there out, until next switch cycle

So my theories and why they may or may not be correct:

• Straight-up shoot-through: not possible due to plenty of dead-time that we can see on traces
• Reverse-recovery of body diode: possible, but I wasn't able to tune the FETs to run in slight interference (negative dead-time) to never turn on body diode, and therefore avoid it. Now that I think about it, maybe the Rdson is so high the diode is conducting whether the FET is on or off in the source->drain direction?
• Output capacitance of the FET that's already off: possible that this is simply the FET output capacitance being charged by the turn-on of the other FET. The issue is I would expect to see some sort of RC waveform, not that super sharp Vds trace on the FET that's about to turn-on
• dV/dt turn-on: the FETs are driven at +-15V bipolar, this was to isolate potential issues with this. Since the gate of the FET in the off state is held at -15V, it would take a hell of a lot of dV/dt to turn it on..

As for the application, this is more of a thought experiment, but basically I'm trying to switch 3A at somewhere in the 100KHz-1MHz range at 400V with some overhead. This is unfortunately slightly higher than what GaN can do.. And not really in the range of higher voltage SiC FETs.

[MagicSmoker]

Your series resonant circuit is effectively 20uH + 2.5nF which resonates at 712kHz with a characteristic Z of 89R. Typically with MOSFET-based bridges you want to operate above resonance so that the resonant network looks inductive, turn on is lossless, and body diode conduction is minimized (turn off is lossy, however).

[T3sl4co1l]

Yeah, silicon is plenty fine here.  I've been playing with a 10W 2MHz design that uses a 3 x 3mm dual MOSFET in Si, no problem.

Note that the lead inductance on that IPAK will be more like 5nH; this should be in the model already?  So, adding pH's here and there externally shouldn't be a big concern.

Did you check the gate voltages to verify they aren't interfering?  Timing looks about right but I never can remember the exact timing of a PULSE offhand...

MagicSmoker is quite right, you're below resonance, so you have a leading phase and high switching losses.

Your output network is in series, so you're not going to get any gain, so the output is under 150V, correct?  LLC network is most commonly used as it gives some voltage gain and a good source and load range.

What the heck is a FFSM1265?  Is that the SiC model linked in the text above?  Oh I need to search -'A', real helpful Google.  Ooh, SMT diode, haven't noticed those before.  Very handy, and a good complement for HV GaN.

SiC would be kind of overkill, but if you're expecting over 200V it's probably best.  Si schottky up to 200-300V are available so if you're less than that, they would be cheaper.

Tim

[uer166]

Thanks for detailed responses as usual T3sl4co1l.

"Did you check the gate voltages to verify they aren't interfering?" Yup it's in the attached traces, plenty of dead-time. By the time one FET turns on, the other is very much OFF at -15V gate voltage.

"you're below resonance, so you have a leading phase and high switching losses." -Is there a paper I can read on this? I'm not sure exactly what this means in the context. I also don't see how this can affect that giant 20ns 5KW pulse in any meaningful way, since the resonant inductor will blow block all of this current. From the traces I can see that this is clearly shoot-through and not going out to the LC resonant circuit.

"Your output network is in series, so you're not going to get any gain, so the output is under 150V, correct?" Yup this is a step-down only converter with plenty of voltage overhead.

[uer166]

"Note that the lead inductance on that IPAK will be more like 5nH; this should be in the model already?  So, adding pH's here and there externally shouldn't be a big concern" Ah yes good point, those 100pH are from when I was experimenting with passivated die GaN FETs where it would be theoretically possible to make that tight of a layout.

[T3sl4co1l]

"you're below resonance, so you have a leading phase and high switching losses." -Is there a paper I can read on this? I'm not sure exactly what this means in the context. I also don't see how this can affect that giant 20ns 5KW pulse in any meaningful way, since the resonant inductor will blow block all of this current. From the traces I can see that this is clearly shoot-through and not going out to the LC resonant circuit.

Simple: reverse recovery.   15ns is quite peppy as MOSFET body diodes go, in fact, you're lucky to see what you do -- or the model is in error, which, who knows.  (I'm guessing that's one of those full-custom models from Infineon, which tend to be more accurate but run really slow?  Otherwise, in the usual MOSFET models, the body diode is an ordinary SPICE diode, which is notoriously poor -- DC characteristics are modeled well, and reverse recovery itself isn't modeled too badly, but turn-off dV/dt, and forward recovery and turn-on dI/dt, aren't modeled in any meaningful way.)

If the phase angle were reversed -- current lagging voltage -- then drain current would be positive at turn-off, automatically pulling the switch node voltage over to the other side, where it's clamped by the opposing body diode.  We don't worry about recovery in this case, because the transistor turns on shortly thereafter, shunting the body diode, and later still, the current reverses.  At the low dI/dt and Vrr the diode sees in this situation, it might still take 100ns (or several 100s, for bigger and higher voltage MOSFETs) to recover, but that's still plenty of time to run at a few MHz.

So simply increasing L*C or reducing t_on will do it.

This may be of interest:
https://www.infineon.com/dgdl/Application_Note_Resonant+LLC+Converter+Operation+and+Design_Infineon.pdf?fileId=db3a30433a047ba0013a4a60e3be64a1
Curves for LC are simpler, and of course you don't get as much gain at the peak.  The constraints on frequency, impedance, voltage and current will all be roughly similar.

Tim