In most switching power regulator applications when u calculate the inductor value the datasheet says deltaiL or inductor ripple current is recommended to lie between 30% and 40% or so of the maximum output current of the circuit. This is the value which u use to calculate the recommended inductance at a given Vin, Vout and switching frequency.
Basically the higher the inductor value is the lower the ripple current is. I can understand that with a lower ripple current in the inductor your inductor losses decrease, your voltage output ripple decreased, the ESR stress in the output capacitor decreases and it is possible to use smaller inductors (lower amp rating).
But what happens if u implement a ripple current of say 10%? Only thing I can think of is that u dont have enough feedback voltage back into the regulator due to the lower delta on the feedback resistors. Is this true and if so, how can I know for a specific part how low you can safely go with the inductor ripple current?
What type of control is it?
If it's an integrated device, chances are, an overly large value will slow down the response, requiring different compensation components -- if external compensation is even provided. It may simply oscillate if it's an internally compensated type.
This is typical of all controllers, whether average current mode, peak current mode, voltage mode or what.
Peak current mode controllers have the added difficulty of inherent chaotic instability at low ripple settings. Slope compensation (in essence, mixing voltage mode PWM with peak current mode to extend the stable range) helps, but only incrementally. This only works down to about 25% ripple, IIRC; any lower requires too much slope compensation to be practical, and it goes unstable again.
Tim
The larger inductance value you choose for a certain current the physically larger the inductor will become, in addition to the control loop issues mentioned above. Therefore you often need to compromise. Increasing the inductor value also makes the maximum inductor current slew rate lower which can be a problem if the load changes is current draw quickly (in the amps per second sense).
Peak current mode controllers have the added difficulty of inherent chaotic instability at low ripple settings. Slope compensation (in essence, mixing voltage mode PWM with peak current mode to extend the stable range) helps, but only incrementally. This only works down to about 25% ripple, IIRC; any lower requires too much slope compensation to be practical, and it goes unstable again.
It has to be the other way around. You need more slope compensation the higher the ripple current is. On the other hand, it can be hard to get good noise immunity in a peak current mode controller if the current ripple is of low amplitude which does limit how large you can make the inductor.
See for example the following article for how much slope compensation is needed:
http://www.ti.com/lit/an/slua101/slua101.pdfTherefore, to guarantee current loop stability, the slope of the
compensation ramp must be greater than one-half of the down slope of
the current waveform.
That can't be right, they work just fine without slope compensation for ripple >100% (i.e., current returns to zero every cycle). It's when current becomes continuous (ripple <100%) that it's a problem (which for a typical setup is also when D > 0.5).
I will have to fully read that document though, thanks. (Lots of good old Unitrode stuff out there that I haven't even seen.)
Tim
DutchGert
The choice of inductor ripple current is an important decision in the design.
Let's take a single switch forward design for example.
In this topology the lower the inductor ripple current the higher the capacitor ESR can be for a given output ripple voltage. That means lower cap stress, which is great.
However, I have found that going to 10% or less inductor ripple current creates difficulty in the current sensing due to the small delta v. The small ramp voltage gets swamped by the switching noise.
Also, what seems to happen is that at low/no load pulse skipping occurs. This is also due to the controllers limited minimum output pulse width. If a current transformer is used in the drain lead rather than a sense resistor in the source lead the gate current pulse due to Ciss is avoided and the noise margin is increased.
Also, if a low inductor ripple current is chosen the short circuit current is only slightly higher than the full load current. This applies to a peak current mode controller design such as a UC3845.
From a pure power density point of view then a high-ish ripple current of about 30% is normally chosen. The burden of dealing with the other problems (such as short circuit protection on primary side) then falls on the control electronics.
I normally avoid sub harmonic instabilities/slope compensation issues by operating at below 50% duty cycle.
Dick
DutchGert
The choice of inductor ripple current is an important decision in the design.
Let's take a single switch forward design for example.
In this topology the lower the inductor ripple current the higher the capacitor ESR can be for a given output ripple voltage. That means lower cap stress, which is great.
However, I have found that going to 10% or less inductor ripple current creates difficulty in the current sensing due to the small delta v. The small ramp voltage gets swamped by the switching noise.
Also, what seems to happen is that at low/no load pulse skipping occurs. This is also due to the controllers limited minimum output pulse width. If a current transformer is used in the drain lead rather than a sense resistor in the source lead the gate current pulse due to Ciss is avoided and the noise margin is increased.
Also, if a low inductor ripple current is chosen the short circuit current is only slightly higher than the full load current. This applies to a peak current mode controller design such as a UC3845.
From a pure power density point of view then a high-ish ripple current of about 30% is normally chosen. The burden of dealing with the other problems (such as short circuit protection on primary side) then falls on the control electronics.
I normally avoid sub harmonic instabilities/slope compensation issues by operating at below 50% duty cycle.
Dick
Thx, that is exactly what i thought
That can't be right, they work just fine without slope compensation for ripple >100% (i.e., current returns to zero every cycle). It's when current becomes continuous (ripple <100%) that it's a problem (which for a typical setup is also when D > 0.5).
I will have to fully read that document though, thanks. (Lots of good old Unitrode stuff out there that I haven't even seen.)
Tim
The instability only appears in continuous mode. In discontinuous mode no information is carried from one cycle to the next by the inductor current so the instability can not appear.
An additional condition is that the duty cycle has to be above 0.5 for the instability to occur. But even below a duty cycle of 0.5 slope compensation can be beneficial as I think is mentioned in that document. Even before full open-voltage-loop instability of the peak current mode modulator is reached there will be gain peaking at fs/2 which can upset the voltage loop.
Sent from my GT-I9000 using Tapatalk 2
Mejajocke
Agreed. I have however found that some people interpret noise in the control loop as an instability and then add more ramp.
Also slope compensation can have some other undesirable effects such as changes in current limit point as a function of duty cycle.
Dick
I have run in to that problem of current limit you mention. In one design I had to boost 2.5-4.2 V to 48 V with 10 W output, and one constraint was that the converter was not to contain any ferromagnetic components.
The first prototype used a conventional boost converter with a 500 nH air-core coil operating at 300 kHz in discontinuous mode. Efficency was about 75 % at minimum input voltage, but by changing the rectifier to a capacitive voltage doubler I got it up to 80 % which wad deemed sufficient.
Operating a boost converter at such a high current downslope rate meant it became impractical to allow continuous mode operation unless the inductance was increased 10 times or so, because otherwise I would have needed about 100 A of compenstion ramp...
Mejajocke
No ferromagnetic material allowed. That's a tough design constraint.
My problem would be that a boost converter will require a duty cycle of 95% to produce 48V output from 2.5V input (1/1-D transfer function).
I must admit, I would be inclined to consider a resonant topology to achieve the boost function. One could wind an air cored transformer with primary and secondary using trifilar wound wire for a 3:1 turns ratio (Like an RF transformer) . Then operate at a HIGH frequency like 1-2Mhz.
There is however one big advantage to boost converters: Efficiency. Their efficiency is excellent.
How about a capacitive charge pump? Probably impractical at 10W though.
Dick
Offhand, I'd use a variation of this, sans the doubler output of course.
It would be fine to create a ~doubled supply, enough to start and then run a logic threshold MOSFET, by rectifying the switching node; meanwhile, turns past the switching node simply generate more and more volts, making as much as desired.
Compactness would be the real problem. An arbitrarily good air-cored transformer (low loss, high K) isn't hard to do, but making it less than, say, 1cc would be more of a challenge.
I've seen efficiency of 67% on a 1V --> 4V boost converter without trying hard, so getting reasonable efficiency I don't think is a big deal, just a matter of having good components (or, being able to use good enough components).
Tim
But you are using a ferromagnetic component!
That's cheating.
Well so what, make a bigass air cored transformer. But like I said, it could be large!
Tim