Space Grade Voltage Translation Solutions for 1.5V I/O to 1.8V I/O?

[bhj99]

Hello everyone, I am trying to find level shifter solutions that are space-qualified (perhaps parts with Total Ionizing Dose (TID) data or radiation hardening) that can logic level translate from FPGA I/O at 1.5V  to and ADC at 1.8V while supporting bidirectional I/O and OE capabilities. This is for high reliability applications. Basically, I am interfacing with SPI data and some status/control discretes from the FPGA 1.5V bank and the transceiver accepts I/O at higher voltages.

I've found a part from ST Microelectronics (P/N 5962F1120701VXC) but the voltage does not quite support and there's insufficient data at 1.5V. I also thought about passive voltage dividers or MOSFETs for translation, but those are unidirectional. Would anyone have reference designs at lower voltages?  I've mostly seen 1.8V -> 3.3V and 3.3V -> 5V.

Does anyone have good solutions that come to mind? I would really appreciate any feedback/suggestions!

[NiHaoMike]

A resistive divider would have a voltage drop going from 1.8V to 1.5V but the drop in the other direction would be only the slight amount caused by loading. That can be offset by having a pullup on the 1.8V side to increase the voltage a little.

[AndrewBCN]

https://www.nxp.com/products/peripherals-and-logic/voltage-level-translators/8-bit-dual-supply-translating-transceiver-open-drain-auto-direction-sensing:NTS0308E

[bhj99]

https://www.nxp.com/products/peripherals-and-logic/voltage-level-translators/8-bit-dual-supply-translating-transceiver-open-drain-auto-direction-sensing:NTS0308E

Couldn’t find testing data for TID. Would this be suitable for high reliability applications?

[bhj99]

A resistive divider would have a voltage drop going from 1.8V to 1.5V but the drop in the other direction would be only the slight amount caused by loading. That can be offset by having a pullup on the 1.8V side to increase the voltage a little.

Do you know of any reference designs for this?

[NiHaoMike]

Do you know of any reference designs for this?

It's a voltage divider. In one direction, it divides 1.8V to 1.5V. In the other direction, the 1.5V passes straight through.

[AndrewBCN]

https://www.nxp.com/products/peripherals-and-logic/voltage-level-translators/8-bit-dual-supply-translating-transceiver-open-drain-auto-direction-sensing:NTS0308E

Couldn’t find testing data for TID. Would this be suitable for high reliability applications?

Contact NXP and ask.

[amosborne]

A resistive divider would be a problem if high-speed is required.

[bhj99]

A resistive divider would be a problem if high-speed is required.

A resistive divider would be a problem if high-speed is required.

Yes, I do have some concern here, as the idea would be to support SPI data, which is fairly high speed.

[SiliconWizard]

The ST rad-hard parts are only spec'ed down to 1.65V I think.

If you're looking for level shifters, I suppose you already considered the following and that was not possible, but can you not power one IO bank of the FPGA at 1.8V? Maybe you wouldn't have enough IOs left at 1.5V if you did that?

[bhj99]

The ST rad-hard parts are only spec'ed down to 1.65V I think.

If you're looking for level shifters, I suppose you already considered the following and that was not possible, but can you not power one IO bank of the FPGA at 1.8V? Maybe you wouldn't have enough IOs left at 1.5V if you did that?

Right, these dedicated use for the FPGA 2.8V IO bank and so the decision to to utilize the 1.5V IO bank.

[Sceptre]

Two other product lines to check:

Cobham AES (formerly Aeroflex Microelectronics):
https://caes.com/products/radiation-hardened-solutions-high-reliability-components/logic

Renesas (formerly Intersil) Rad Hard Digital:
https://www.renesas.com/us/en/products/space-harsh-environment

No experience with using them at 1.5V, don't know if they have the same limitations as the ST parts.