250V MOSFET breaking down under load?

[tom66]

I've just finished repair of an LG 50PS3000 plasma TV with the common red tint to the image fault, this is caused by a faulty Z-sustain (common electrode driver for the plasma panel) due three FETs shorted.

Initially I didn't have one of the FETs necessary, so replaced just the other two, as the one left was the Vzbias regulator, and didn't test as shorted in any way. Vzbias on these plasma panels is about 95V, adjustable over a range of 80V to 110V depending on the requirements of each panel. The FET is responsible for taking the 200V or so sustain voltage and regulating this down via linear regulation to the ~95V. The FET gets fairly warm in operation - about 75C. Vzbias current is about 40mA (measured across 1.1ohm on the board in series with Vzbias output.)

When I tested the TV, I found the Vzbias was stuck at 130V and the adjustment would not let it go down, the result was the image was "maldischarging" a fancy word for having random flickering pixels all over the screen (sparklies) although the image was otherwise OK. As I ran the TV for a few minutes, the Vzbias rose to about 150V and the image became progressively worse, eventually showing a subtle orange glow to everything due to the maldischarge.  I shut the TV off, and tried it 30 minutes later after the TV had cooled down. The Vzbias started again at 130V, and as the set warmed up it again rose to 150V. I did not let it go any higher as I could see the power supply was struggling to supply the over discharged image (significantly higher than normal power usage.)

So I decided to pull the FET, and it tested good on my DCA55 (N-channel FQFP51N25, characteristics matched datasheet.) I tested on my meter, and the FET tested good, but I found that the drain-source showed 5.5kohm when fwd biased - reverse bias showed open circuit. This was with gate source shorted.

I replaced the FET and the Vzbias returned immediately to 95V, and the TV worked perfectly. Ran the TV for over an hour, no change in behaviour, Vzbias rock solid.

It seems to  me that under load, temperature, and high voltage bias, this FET was starting to break down, but had not failed yet completely. Has anyone else encountered a MOSFET behaving like this? Bear in mind when the other two FETs short, it will subject this FET to a direct short, so it will basically be dissipating the full short circuit current of the power supply (several amps) at about 200V until the PSU voltage collapses, there is a capacitance of over 2000uF so substantial energy could be dumped into it. So I can image that it could fail...

[TerminalJack505]

If I understand the purpose of this particular FET then it sounds like they used a MOSFET designed for switching in a linear application. 

What you may have been seeing is discussed in this NASA document.

A quote from the document's introduction:

Metal-oxide semiconductor field-effect transistors (MOSFETs) are used extensively in flight hardware and ground support equipment. In the quest for faster switching times and lower “on resistance,” the MOSFETs designed from 1998 to the present have achieved most of their intended goals. Unfortunately, along with the good (higher power efficiencies and lower total mass in DC – DC converters, and high speed switches) has come the bad. In the quest for lower on resistance and higher switching speeds, the designs now being produced allow the charge-carrier dominated region (once small and outside of the area of concern) to become important and inside the safe operating area (SOA). The charge-carrier dominated region allows more current to flow as the temperature increases. The higher temperatures produce more current resulting in the beginning of thermal runaway.

[tom66]

Interesting. Yes, this FET is operating entirely in a linear region. However I would not expect it to be under much stress. The peak current is 200mA during the bias period of each frame and the RMS current is 40mA.  At most, it's dissipating about 20 watts peak, 4 watts average. So I wouldn't expect it to be anywhere close to the SOA limit of the device and not inside of that thermal runaway region - that being said I don't have specifications on this device that go into that detail.

The two other FETs which are wired back-to-back do often fail on this panel. They're subject to a little bit higher dissipation. I am not sure why they fail but I did find that the thermal paste on them was very minimal and degraded.