FET gate drive transformer leakage figure....minimum is stated, not max

[ocset]

Hello,

Do you know why this gate drive transformer family (HM42) states the minimum leakage inductance instead of the maximum?......as you know, the minimum figure is not useful....customers need the maximum, so as to calculate the delay in turning on the FET...   

http://www.farnell.com/datasheets/2333110.pdf?_ga=2.244164165.1106301863.1511695680-287702491.1506211291

If you are also stumped, then please may you tell of a different family of OTS FET pulse transformer drivers?, which do state max leakage...F(sw) is 100khz so we need low leakage.