Do I really need to connect all GND pins to, well ground?

[johnnyfp]

On most MCU's and other IC's they have multiple pins assigned to GND/VSS (excluding AGND or other specific function related grounds). Do I need to attach each one to ground or can I leave one or two floating. Is there any risk to that or is it down to the IC I'm using?

Reason I ask is that I have an annoying GND pin on a MCU that I just can't route too on a double loaded board and I really don't want to go Blind via.

[marshallh]

All power and ground pins are always connected. If they weren't, they'd NC.

This is very common on larger devices. Where signal integrity is a concern, you want lots of return paths to reduce loop area. FPGAs typically have 1/4 to 1/3 of their pins reserved to grounding.

[georges80]

If it's just a home project, you can likely get away with it is one of MANY power ground connections, especially if there are other ground pins close by.

The reason for multiple ground pins is to provide a solid and reliable ground reference to various areas of the IC for power and noise reason. The designer used recommended design practices to allocate an appropriate number of power pins based on design rules, trying to 2nd guess from the 'outside' isn't a wise move.

I would never risk it on a production board.

cheers,
george.

[george graves]

Also, there are some datasheets that call for all pins of a package to be soldered to help dissipate heat out of the chips IIRC.

[tggzzz]

On most MCU's and other IC's they have multiple pins assigned to GND/VSS (excluding AGND or other specific function related grounds). Do I need to attach each one to ground or can I leave one or two floating. Is there any risk to that or is it down to the IC I'm using?

Reason I ask is that I have an annoying GND pin on a MCU that I just can't route too on a double loaded board and I really don't want to go Blind via.

Connecting all ground pins is extremely important to ensure signal integrity. A classic problem with amateur projects and designs is that they don't include enough ground pins on a connector and/or they group all the ground pins together - whereas they should be evenly distributed.

Each ground pin has associated inductance, and a changing current induces a changing voltage which can corrupt the signal. V=L^di/_dt, so a 1mA signal turning on or off in 1ns though a lead with 1nH inductance will induce a 1V drop! Having N parallel grounds reduces the inductance by a factor of N - and hence induced voltage.

Having a ground next to a signal lead also reduces reflections due to impedance variations in the transmission lines.

Reducing the loop area reduces EMI, but that is secondary to the other considerations.

The inductance (and various parasitic capacitances and V-vs-I graphs) is specified in the associated IBIS file (warning IBIS files are large and need careful interpretation).

[ajb]

And even if signal integrity is not a concern for your application, you likely need all ground pins connected to be able to achieve the rated current sink capacity for your IO pins.

[johnnyfp]

Yeah Ok I feared as much.

Thanks.  Ripping up all the tracks around the troublesome pin and rerouting. Teaches me for being so lazy. Let the fun times begin!

[DanielS]

The pinouts on most modern digital ICs are designed around the idea of having at least one ground and power plane available - not much other choice when you often have 30+ pins carrying high-speed busses connecting external RAM, flash, ADCs, DACs, FPGAs, etc. all requiring coupling to a supply or ground line or plane for their return current path.

[rx8pilot]

Yeah Ok I feared as much.

Thanks.  Ripping up all the tracks around the troublesome pin and rerouting. Teaches me for being so lazy. Let the fun times begin!

So many of my intended 2 layer designs end up being at least 4 layer in the end. Not all products can support the extra cost - but I am not gods gift to PCB routing and I have very little time. Having 2 extra layers keeps ground and power anywhere I need it without having to work hard for it. Getting into a trace trap sucks for sure...I have stared at the screen for countless hours looking for a path for the last pin or two. Feel your pain.

[johnnyfp]

I had everything nice an neat. With lines at 45 and 90 degrees. But now I've had to use odd angles and Curves. CURVES!!!!!!

Sometimes PCB Routing can be 

[f5r5e5d]

few projects I've done could afford the cost of doing it 2-layer - the time to iterate for performance in 2-layers costs lots more than 4-layer boards

[DanielS]

few projects I've done could afford the cost of doing it 2-layer - the time to iterate for performance in 2-layers costs lots more than 4-layer boards

For a one/few-off jobs, yeah, the effort it takes to fit everything on two layers and get it all working correctly can be steep and feel unnecessary compared to using four layers and calling it done. For a mass-produced board though, chances that the extra effort will be worth it are much higher.

[johnnyfp]

Well I've managed to route the board. Looks like a Fingerprint. Soo tired,  one trace, two trace, three trace